LM5025B

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SNVS354B – JULY 2005 – REVISED MARCH 2013

Current Limit

The LM5025B contains two modes of over-current protection. If the sense voltage at the CS1 input exceeds

0.25V the present power cycle is terminated (cycle-by-cycle current limit). If the sense voltage at the CS2 input

exceeds 0.5V, the controller will terminate the present cycle, discharge the softstart capacitor and reduce the

softstart current source to 1µA. The softstart (SS) capacitor is released after being fully discharged and slowly

charges with a 1µA current source. When the voltage at the SS pin reaches approximately 1V, the PWM

comparator will produce the first output pulse at OUT_A. After the first pulse occurs, the softstart current source

will revert to the normal 20µA level. Fully discharging and then slowly charging the SS capacitor protects a

continuously over-loaded converter with a low duty cycle hiccup mode.

These two modes of over-current protection allow the user great flexibility to configure the system behavior in

over-load conditions. If it is desired for the system to act as a current source during an over-load, then the CS1

cycle-by-cycle current limiting should be used. In this case the current sense signal should be applied to the CS1

input and the CS2 input should be grounded. If during an overload condition it is desired for the system to briefly

shutdown, followed by softstart retry, then the CS2 hiccup current limiting mode should be used. In this case the

current sense signal should be applied to the CS2 input and the CS1 input should be grounded. This shutdown /

soft-start retry will repeat indefinitely while the over-load condition remains. The hiccup mode will greatly reduce

the thermal stresses to the system during heavy overloads. The cycle-by-cycle mode will have higher system

thermal dissipations during heavy overloads, but provides the advantage of continuous operation for short

duration overload conditions.

It is possible to utilize both over-current modes concurrently, whereby momentary overload conditions activate

the CS1 cycle-by-cycle mode while prolonged overloading activates the CS2 hiccup mode. Generally the CS1

input will always be configured to monitor the main switch FET current each cycle. The CS2 input can be

configured in several different ways depending upon the system requirements.

a) The CS2 input can also be set to monitor the main switch FET current except scaled to a higher threshold

than CS1

b) An external over-current timer can be configured which trips after a pre-determined over-current time, driving

the CS2 input high, initiating a hiccup event.

c) In a closed loop voltage regulaton system, the COMP input will rise to saturation when the cycle-by-cycle

current limit is active. An external filter/delay timer and voltage divider can be configured between the COMP pin

and the CS2 pin to scale and delay the COMP voltage. If the CS2 pin voltage reaches 0.5V a hiccup event will

initiate.

A small RC filter, located near the controller, is recommended for each of the CS pins. The CS1 input has an

internal FET which discharges the current sense filter capacitor at the conclusion of every cycle, to improve

dynamic performance. This same FET remains on an additional 50ns at the start of each main switch cycle to

attenuate the leading edge spike in the current sense signal. The CS2 discharge FET only operates following a

CS2 event, UVLO and thermal shutdown.

The LM5025B CS comparators are very fast and may respond to short duration noise pulses. Layout

considerations are critical for the current sense filter and sense resistor. The capacitor associated with the CS

filter must be placed very close to the device and connected directly to the pins of the IC (CS and GND). If a

current sense transformer is used, both leads of the transformer secondary should be routed to the filter

network , which should be located close to the IC. If a sense resistor in the source of the main switch MOSFET is

used for current sensing, a low inductance type of resistor is required. When designing with a current sense

resistor, all of the noise sensitive low power ground connections should be connected together near the IC GND

and a single connection should be made to the power ground (sense resistor ground point).

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