LMV1099

SNAS490D – JULY 2010 – REVISED MAY 2013

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Example 1:

An application using microphones with 50mVP-P maximum output voltage, and a baseband chip after the

LMV1099 with 1.5VP-P maximum input voltage.

For optimum noise performance, the gain of the input stage should be set to the maximum.

1. 50mVP-P + 36dB = 3.1VP-P.

2. 3.1VP-P is higher than the maximum 1.5VP-P allowed for the Noise Cancelling Block (NCB). This means a

gain lower than 29.5dB should be selected.

3. Select the nearest lower gain from the gain settings shown in Table 5, 28dB is selected. This will prevent the

NCB from being overloaded by the microphone. With this setting, the resulting output level of the Pre

Amplifier will be 1.26VP-P.

4. The NCB has a gain of 0dB which will result in 1.26VP-P at the output of the LMV1099. This level is less than

the maximum level that is allowed at the input of the post amp of the LMV1099.

5. The baseband chip limits the maximum output voltage to 1.5VP-P with the minimum of 6dB post amp gain,

this results in requiring a lower level at the input of the post amp of 0.75VP-P. Now calculating this for a

maximum preamp gain, the output of the preamp must be no more than 0.75mVP-P.

6. Calculating the new gain for the preamp will result in <23.5dB gain.

7. The nearest lower gain will be 22dB.

So using preamp gain = 22dB and postamp gain = 6dB is the optimum for this application.

Example 2:

An application using microphones with 10mVP-P maximum output voltage, and a baseband chip after the

LMV1099 with 3.3VP-P maximum input voltage.

For optimum noise performance we would like to have the maximum gain at the input stage.

1. 10mVP-P + 36dB = 631mVP-P.

2. This is lower than the maximum 1.5VP-P, so this is OK.

3. The NCB has a gain of 0dB which will result in 1.5VP-P at the output of the LMV1099. This level is lower than

the maximum level that is allowed at the input of the Post Amp of the LMV1099.

4. With a Post Amp gain setting of 6dB the output of the Post Amp will be 3VP-P which is OK for the baseband.

5. The nearest lower Post Amp gain will be 6dB.

So using preamp gain = 36dB and postamp gain = 6dB is optimum for this application.

I2C Compatible Interface

The LMV1099 is controlled through an I2C compatible serial interface that consists of a serial data line (SDA) and

a serial clock (SCL). The clock line is uni-directional. The data line is bi-directional (open-collector) although the

LMV1099 does not write to the I2C bus. The LMV1099 and the master can communicate at clock rates up to

400kHz. Figure 22 shows the I2C Interface timing diagram. Data on the SDA line must be stable during the HIGH

period of SCL. The LMV1099 is a transmit/receive slave-only device, reliant upon the master to generate the

SCL signal. Each transmission sequence is framed by a START condition and a STOP condition (Figure 23).

The data line is 8 bits long and is always followed by an acknowledge pulse (Figure 24).

I2C Compatible Interface Power Supply Pin (I2CVDD)

The LMV1099 I2C interface is powered up through the I2CVDD pin. The LMV1099 I

2C interface operates at a

voltage level set by the I2CVDD pin which can be set independent to that of the main power supply pin VDD. This

is ideal whenever logic levels for the I2C Interface are dictated by a microcontroller or microprocessor that is

operating at a lower supply voltage than the main battery of a portable system.

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