PCM1796DB datasheet(28/63 Pages) TI2

28 / 63 page

PCM1796

SLES100A − DECEMBER 2003 − REVISED NOVEMBER 2006

www.ti.com

DME: Digital De-Emphasis Control

This bit is available for read and write.

Default value: 0

DME = 0

De-emphasis disabled (default)

DME = 1

De-emphasis enabled

The DME bit is used to enable or disable the de-emphasis function for both channels.

MUTE: Soft Mute Control

This bit is available for read and write.

Default value: 0

MUTE = 0

Soft mute disabled (default)

MUTE = 1

Soft mute enabled

The MUTE bit is used to enable or disable the soft mute function for both channels.

Soft mute is operated as a 256-step attenuator. The speed for each step to –

∞ dB (mute) is determined by the

attenuation rate selected in the ATS register.

B15

B14

B13

B12

B11

B10

R/W

REV

ATS1

ATS0

OPE

RSV

DFMS

FLT

INZD

R/W: Read/Write Mode Select

When R/W = 0, a write operation is performed.

When R/W = 1, a read operation is performed.

Default value: 0

REV: Output Phase Reversal

This bit is available for read and write.

Default value: 0

REV = 0

Normal output (default)

REV = 1

Inverted output

The REV bit is used to invert the output phase for both channels.

ATS[1:0]: Attenuation Rate Select

These bits are available for read and write.

Default value: 00

ATS[1:0]

Attenuation Rate Selection

Every LRCK (default)

LRCK/2

LRCK/4

LRCK/8

The ATS[1:0] bits are used to select the rate at which the attenuator is decremented/incremented during level

transitions.

PCM1796DB Datasheet(PDF) 28 Page - Texas Instruments

PCM1796DB Datasheet(HTML) 28 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63

Datasheet Download

Link URL