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74LVQ00 Datasheet(PDF) 1 Page - STMicroelectronics |
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74LVQ00 Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 8 page  74LVQ00 QUAD 2-INPUT NAND GATE ® February 1999 s HIGH SPEED: tPD = 5.5 ns (TYP.) at VCC =3.3V s COMPATIBLE WITH TTL OUTPUTS s LOW POWER DISSIPATION: ICC =2 µA (MAX.) at TA =25 oC s LOW NOISE: VOLP = 0.3 V (TYP.) at VCC =3.3V s 75 Ω TRANSMISSION LINE DRIVING CAPABILITY s SYMMETRICAL OUTPUT IMPEDANCE: |IOH|=IOL = 12 mA (MIN) s PCI BUS LEVELS GUARANTEED AT 24mA s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 3.6V (1.2V Data Retention) s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 00 s IMPROVED LATCH-UP IMMUNITY DESCRIPTION The LVQ00 is a low voltage CMOS QUAD 2-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C 2MOS technology. It is ideal for low power and low noise 3.3V applications. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. It has better speed performance at 3.3V than 5V LS-TTL family combined with the true CMOS low power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES : 74LVQ00M 74LVQ00T M (Micro Package) T (TSSOP Package) 1/8 |
Similar Part No. - 74LVQ00 |
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Similar Description - 74LVQ00 |
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