ICL7660S, ICL7660A

FN3179 Rev 7.01

Page 10 of 14

Feb 10, 2020

0.1µF, can be used in conjunction with the Boost Pin to achieve

similar output currents compared to the device free running

with C1 = C2 = 10µF or 100µF. (see Figure 11).

Increasing the oscillator frequency can also be achieved by

overdriving the oscillator from an external clock, as shown in

Figure 16. In order to prevent device latchup, a 1k

 resistor

must be used in series with the clock output. In a situation

where the designer has generated the external clock frequency

using TTL logic, the addition of a 10k

 pull-up resistor to V+

supply is required. Note that the pump frequency with external

clocking, as with internal clocking, will be one-half of the clock

frequency. Output transitions occur on the positive going edge

of the clock.

It is also possible to increase the conversion efficiency of the

ICL7660S and ICL7660A at low load levels by lowering the

oscillator frequency. This reduces the switching losses, and is

shown in Figure 17. However, lowering the oscillator frequency

will cause an undesirable increase in the impedance of the

pump (C1) and reservoir (C2) capacitors; this is overcome by

increasing the values of C1 and C2 by the same factor by

which the frequency has been reduced. For example, the

addition of a 100pF capacitor between pin 7 (OSC and V+) will

lower the oscillator frequency to 1kHz from its nominal

frequency of 10kHz (a multiple of 10), and thereby necessitate

a corresponding increase in the value of C1 and C2 (from 10µF

to 100µF).

Positive Voltage Doubling

The ICL7660S and ICL7660A may be employed to achieve

positive voltage doubling using the circuit shown in Figure 18.

In this application, the pump inverter switches of the ICL7660S

and ICL7660A are used to charge C1 to a voltage level of V+ -

VF, where V+ is the supply voltage and VF is the forward

voltage on C1, plus the supply voltage (V+) is applied through

diode D2 to capacitor C2. The voltage thus created on C2

becomes (2V+) - (2VF) or twice the supply voltage minus the

combined forward voltage drops of diodes D1 and D2.

The source impedance of the output (VOUT) will depend on the

output current, but for V+ = 5V and an output current of 10mA,

it will be approximately 60

.

Combined Negative Voltage Conversion and

Positive Supply Doubling

Figure 19 combines the functions shown in Figure 15 and

Figure 18 to provide negative voltage conversion and positive

voltage doubling simultaneously. This approach would be

suitable, for example, for generating +9V and -5V from an

existing +5V supply. In this instance, capacitors C1 and C3

perform the pump and reservoir functions, respectively, for

negative voltage generation, while capacitors C2 and C4 are

pump and reservoir, respectively, for the doubled positive

voltage. There is a penalty in this configuration which

combines both functions, however, in that the source

impedances of the generated supplies will be somewhat

higher, due to the finite impedance of the common charge

pump driver at pin 2 of the device.

Voltage Splitting

The bidirectional characteristics can also be used to split a

high supply in half, as shown in Figure 20. The combined load

will be evenly shared between the two sides, and a high value

1

2

3

4

8

7

6

5

+

-

10µF

ICL7660S

VOUT

V+

+

-

10µF

V+

CMOS

GATE

1kΩ

FIGURE 16. EXTERNAL CLOCKING

ICL7660A

1

2

3

4

8

7

6

5

+

-

ICL7660S

VOUT

V+

+

-

C2

C1

COSC

FIGURE 17. LOWERING OSCILLATOR FREQUENCY

ICL7660A

1

2

3

4

8

7

6

5

ICL7660S

V+

D1

D2

C1

C2

VOUT =

(2V+)

- (2VF)

+

-

+

-

FIGURE 18. POSITIVE VOLTAGE DOUBLER

NOTE: D1 AND D2 CAN BE ANY SUITABLE DIODE.

ICL7660A

1

2

3

4

8

7

6

5

ICL7660S

V+

D1

D2

C4

VOUT = (2V+) -

(VFD1) - (VFD2)

+

-

C2

+

-

C3

+

-

VOUT = -VIN

C1

+

-

FIGURE 19. COMBINED NEGATIVE VOLTAGE CONVERTER

AND POSITIVE DOUBLER

D3

ICL7660A