X84161 datasheet(5/18 Pages) ICMIC

5 / 18 page

X84161/641/129

Low Power Operation

The device enters an idle state, which draws minimal cur-

rent when:

—an illegal sequence is entered. The following are the

more common illegal sequences:

• Read/Write/Write—any time

• Read/Write ‘1’—When writing the address or

writing data.

• Write ‘1’—when reading data

• Read/Read/Write ‘1’—after data is written to

device, but before entering the NV write sequence.

—the device powers-up;

—a nonvolatile write operation completes.

While a sequential read is in progress, the device

remains in an active state. This state draws more current

than the idle state, but not as much as during a read

itself. To go back to the lowest power condition, an invalid

condition is created by writing a ‘1’ after the last bit of a

read operation.

Write Protection

The following circuitry has been included to prevent

inadvertent nonvolatile writes:

—The internal Write Enable latch is reset upon

power-up.

—A reset sequence must be issued to set the internal

write enable latch before starting a write sequence.

—A special “start nonvolatile write” command sequence

is required to start a nonvolatile write cycle.

—The internal Write Enable latch is reset automatically

at the end of a nonvolatile write cycle.

—The internal Write Enable latch is reset and remains

reset as long as the WP pin is LOW, which blocks all

nonvolatile write cycles.

—The internal Write Enable latch resets on an invalid

write operation.

SYMBOL TABLE

WAVEFORM

INPUTS

OUTPUTS

Must be

steady

Will be

steady

May change

from LOW to

HIGH

Will change

from LOW to

HIGH

May change

from HIGH to

LOW

Will change

from HIGH to

LOW

Don’t Care:

Changes

Allowed

Changing:

State Not

Known

N/A

Center Line

is High

Impedance

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