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74VHCT02A Datasheet(PDF) 1 Page - STMicroelectronics |
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74VHCT02A Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 7 page ![]() 74VHCT02A QUAD 2-INPUT NOR GATE ® August 1999 PIN CONNECTION AND IEC LOGIC SYMBOLS s HIGH SPEED: tPD = 3.5 ns (TYP.) at VCC =5V s LOW POWER DISSIPATION: ICC =2 µA (MAX.) at TA =25 oC s COMPATIBLE WITH TTL OUTPUTS: VIH =2V (MIN), VIL = 0.8V (MAX) s POWER DOWN PROTECTION ON INPUTS & OUTPUTS s SYMMETRICAL OUTPUT IMPEDANCE: |IOH|=IOL = 8 mA (MIN) s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 02 s IMPROVED LATCH-UP IMMUNITY s LOW NOISE: VOLP = 0.8V (Max.) DESCRIPTION The 74VHCT02A is an advanced high-speed CMOS QUAD 2-INPUT NOR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C 2MOS technology. The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output. Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. ORDER CODES : 74VHCT02AM 74VHCT02AT M (Micro Package) T (TSSOP Package) 1/7 |
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