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TLV2464AMDREP Datasheet(PDF) 23 Page - Texas Instruments |
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TLV2464AMDREP Datasheet(HTML) 23 Page - Texas Instruments |
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23 / 33 page ![]() TLV2460AEP TLV2461AEP TLV2462AEP TLV2463AEP TLV2464AEP FAMILY OF LOW POWER RAILTORAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH SHUTDOWN SGLS132C − AUGUST 2002 − REVISED OCTOBER 2005 23 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION _ + Rnull RL CL Figure 49 APPLICATION INFORMATION driving a capacitive load When the amplifier is configured in this manner, capacitive loading directly on the output will decrease the device’s phase margin leading to high frequency ringing or oscillations. Therefore, for capacitive loads of greater than 10 pF, it is recommended that a resistor be placed in series (RNULL) with the output of the amplifier, as shown in Figure 49. A minimum value of 20 Ω should work well for most applications. CLOAD RF Input Output RG RNULL _ + Figure 50. Driving a Capacitive Load offset voltage The output offset voltage, (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times the corresponding gains. The following schematic and formula can be used to calculate the output offset voltage: V OO + V IO 1 ) R F R G " I IB ) R S 1 ) R F R G " I IB– R F + − VI + RG RS RF IIB− VO IIB+ Figure 51. Output Offset Voltage Model |
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