Code

2.0

1.5

1.0

0.5

0

−0.5

−1.0

−1.5

−2.0

0

1536

2048

2560

3072

3584

512

1024

4096

f

IN = 5MHz

Input Amplitude (A)

100

90

80

70

60

50

40

30

20

10

0

−70

−60

−30

−20

−10

−50

−40

0

f

IN = 5MHz

SNR (dBFS)

SNR (dBc)

SFDR (dBc)

Input Amplitude (A)

100

90

80

70

60

50

40

30

20

10

0

−70

−60

−30

−20

−10

−50

−40

0

f

IN = 10MHz

SNR (dBFS)

SNR (dBc)

SFDR (dBc)

Duty Cycle (%)

90

85

80

75

70

65

60

55

20

50

60

70

30

40

80

f

IN = 5MHz

SFDR

SNR

Input Frequency (MHz)

95

90

85

80

75

70

65

60

55

5

20

25

30

35

40

45

10

15

50

SFDR

SNR

Sample Rate (MSPS)

90

85

80

75

70

65

60

55

20

35

40

25

30

45

SFDR

SNR

SINAD

f

IN = 5MHz

ADS5270

www.ti.com............................................................................................................................................... SBAS293F – JANUARY 2004 – REVISED JANUARY 2009

TYPICAL CHARACTERISTICS (continued)

Typical values are at TA = +25C, clock frequency = maximum specified, 50% clock duty cycle, AVDD = 3.3V, LVDD = 3.3V,

–1dBFS, ISET = 56.2kΩ, internal voltage reference, and LVDS buffer current at 3.5mA per channel, unless otherwise noted.

INTEGRAL NONLINEARITY

SWEPT INPUT POWER

Figure 7.

Figure 8.

SWEPT INPUT POWER

DYNAMIC PERFORMANCE vs DUTY CYCLE

Figure 9.

Figure 10.

DYNAMIC PERFORMANCE vs INPUT FREQUENCY

DYNAMIC PERFORMANCE vs SAMPLE RATE

Figure 11.

Figure 12.

Copyright © 2004–2009, Texas Instruments Incorporated

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