TVP5146M2IPFPR datasheet(6/109 Pages) TI2

6 / 109 page

TVP5146M2

SLES141H

– JULY 2005 – REVISED FEBRUARY 2012

www.ti.com

2-47

Brightness and Contrast Range Extender Register

......................................................................... 54

2-48

Sync Control Register

........................................................................................................... 55

2-49

Output Formatter Control 1 Register

.......................................................................................... 55

2-50

Output Formatter Control 2 Register

.......................................................................................... 56

2-51

Output Formatter Control 3 Register

.......................................................................................... 56

2-52

Output Formatter Control 4 Register

.......................................................................................... 57

2-53

Output Formatter Control 5 Register

.......................................................................................... 58

2-54

Output Formatter Control 6 Register

.......................................................................................... 59

2-55

Clear Lost Lock Detect Register

............................................................................................... 59

2-56

Status 1 Register

................................................................................................................ 60

2-57

Status 2 Register

................................................................................................................ 61

2-58

AGC Gain Status Register

..................................................................................................... 61

2-59

Video Standard Status Register

............................................................................................... 62

2-60

GPIO Input 1 Register

.......................................................................................................... 62

2-61

GPIO Input 2 Register

.......................................................................................................... 63

2-62

Vertical Line Count Register

................................................................................................... 63

2-63

AFE Coarse Gain for CH 1 Register

.......................................................................................... 64

2-64

AFE Coarse Gain for CH 2 Register

.......................................................................................... 64

2-65

AFE Coarse Gain for CH 3 Register

.......................................................................................... 65

2-66

AFE Coarse Gain for CH 4 Register

.......................................................................................... 65

2-67

AFE Fine Gain for Pb_B Register

............................................................................................. 66

2-68

AFE Fine Gain for Y_G_Chroma Register

................................................................................... 66

2-69

AFE Fine Gain for Pr_R Register

............................................................................................. 66

2-70

AFE Fine Gain for CVBS_Luma Register

.................................................................................... 67

2-71

F-Bit and V-Bit Decode Control 1 Register

................................................................................... 68

2-72

Back-End AGC Control Register

.............................................................................................. 69

2-73

AGC Decrement Speed Register

.............................................................................................. 69

2-74

ROM Version Register

.......................................................................................................... 69

2-75

RAM Version MSB Register

.................................................................................................... 69

2-76

AGC White Peak Processing Register

....................................................................................... 70

2-77

F-Bit and V-Bit Control 2 Register

............................................................................................. 71

2-78

VCR Trick Mode Control Register

............................................................................................. 71

2-79

Horizontal Shake Increment Register

......................................................................................... 71

2-80

AGC Increment Speed Register

............................................................................................... 72

2-81

AGC Increment Delay Register

................................................................................................ 72

2-82

Chip ID MSB Register

.......................................................................................................... 72

2-83

Chip ID LSB Register

........................................................................................................... 72

2-84

RAM Version LSB Register

.................................................................................................... 73

2-85

Color PLL Speed Control Register

............................................................................................ 73

2-86

Status Request Register

........................................................................................................ 73

2-87

Vertical Line Count Register

................................................................................................... 73

2-88

AGC Decrement Delay Register

............................................................................................... 74

2-89

VDP TTX Filter and Mask Register

........................................................................................... 74

2-90

VDP TTX Filter Control Register

.............................................................................................. 75

2-91

VDP FIFO Word Count Register

.............................................................................................. 76

2-92

VDP FIFO Interrupt Threshold Register

...................................................................................... 77

2-93

VDP FIFO Reset Register

...................................................................................................... 77

2-94

VDP FIFO Output Control Register

........................................................................................... 77

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