CD74ACT175 Quadruple D-type Flip-Flop with Clear

1 Features

• Inputs are TTL-voltage compatible

• Contains four flip-flops with double-rail outputs

• Buffered inputs

• Speed of bipolar F, AS, and S, with significantly

reduced power consumption

• Balanced propagation delays

• ±24mA output drive current

– Fanout to 15 F devices

• SCR-latchup-resistant CMOS process and circuit

design

2 Applications

• Buffer/Storage Registers

• Shift Registers

• Pattern Generators

3 Description

This positive-edge-triggered D-type flip-flop has a

direct clear (CLR) input. The CD74ACT175 features

complementary outputs from each flip-flop.

Package Information

PART NUMBER

PACKAGE(1)

PACKAGE SIZE(2)

BODY SIZE(3)

CD74ACT175

N (PDIP, 16)

19.3mm × 9.4mm

19.3mm × 6.35mm

D (SOIC, 16)

9.9mm × 6mm

9.9mm × 3.9mm

(1)

For more information, see Section 11.

(2)

The package size (length × width) is a nominal value and

includes pins, where applicable.

(3)

The body size (length × width) is a nominal value and does

not include pins.

Logic Diagram (Positive Logic)

CD74ACT175

SCHS345A – APRIL 2003 – REVISED MAY 2024

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.