1

2

3

4

5

6

1A

X

VCC

2A

1Y

2Y

Y

X

Y

SN74LVC2G04

www.ti.com

SCES195N – APRIL 1999 – REVISED AUGUST 2015

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

9.1 Application Information

The SN74LVC2G04 contains two logic inverters. It can be used in a wide variety of applications, with this being

one example. Because this part has overvoltage tolerant inputs, it can be used for down translating logic levels.

This example explains the method used for down-translating with this logic gate.

9.2 Typical Application

Figure 3. Application Schematic

9.2.1 Design Requirements

The inputs, X and Y in Figure 3, to this device can be any value from –0.5 V to 6.5 V, according to Absolute

Maximum Ratings. Because the input limits are not associated with VCC, down-translation is simple. The output

voltage is selected with VCC, and so long as the input logic voltage is larger than VIH, found in Recommended

Operating Conditions, the output will trigger properly.

9.2.2 Detailed Design Procedure

1. Recommended Input Conditions

–

For rise time and fall time specifications, see (

Δt/ΔV) in the Recommended Operating Conditions

table.

–

For specified high and low levels, see (VIH and VIL) in the Recommended Operating Conditions table.

–

Inputs are overvoltage tolerant allowing them to go as high as (VI max) in the Recommended

Operating Conditions table at any valid VCC.

2. Recommend Output Conditions

–

Load currents should not exceed (IO max) per output and should not exceed total current (continuous

current through VCC or GND) for the part. These limits are located in the Absolute Maximum Ratings

table.

–

Outputs should not be pulled above VCC.

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