SN74LVC2T45-Q1 Automotive Dual-Bit Dual-Supply Bus Transceiver With

Configurable Voltage Translation

1 Features

• AEC-Q100 qualified for automotive applications

• Fully configurable dual-rail design allows each port

to operate over the full 1.65V to 5.5V power-supply

range

• VCC isolation feature – if either VCC input is at

GND, both ports are in the high-impedance state

• DIR input circuit referenced to VCCA

• Low power consumption, 10μA maximum ICC

• ±24mA output drive at 3.3V

• Ioff supports Partial-Power-Down mode operation

• Maximum data rates:

– 420Mbps (3.3V to 5V translation)

– 210Mbps (translate to 3.3V)

– 140Mbps (translate to 2.5V)

– 75Mbps (translate to 1.8V)

2 Applications

• Personal electronic

• Industrial

• Enterprise

• Telecom

B1

DIR

5

7

A1

2

VCCA

VCCB

B2

6

A2

3

Functional Block Diagram

3 Description

This dual-bit noninverting bus transceiver uses two

separate configurable power-supply rails. The A port

is designed to track VCCA. VCCA accepts any supply

voltage from 1.65V to 5.5V. The B port is designed

to track VCCB. VCCB accepts any supply voltage from

1.65V to 5.5V. This allows for universal low-voltage

bidirectional translation between any of the 1.8V, 2.5V,

3.3V, and 5V voltage nodes.

The SN74LVC2T45-Q1 is designed for asynchronous

communication between two data buses. The logic

levels of the direction-control (DIR) input activate

either the B-port outputs or the A-port outputs. The

device transmits data from the A bus to the B bus

when the B-port outputs are activated, and from the

B bus to the A bus when the A-port outputs are

activated. The input circuitry on both A and B ports

are always active and must have a logic HIGH or

LOW level applied to prevent excess ICC and ICCZ.

The SN74LVC2T45-Q1 is designed so that VCCA

supplies the DIR input circuit. This device is fully

specified for partial-power-down applications using

Ioff. The Ioff circuitry disables the outputs, preventing

damaging current backflow through the device when it

is powered down.

The VCC isolation feature is designed so that if either

VCC input is at GND, both ports are in the high-

impedance state.

Package Information

PART NUMBER

PACKAGE(1)

PACKAGE SIZE(2)

SN74LVC2T45-Q1

DCU (VSSOP, 8)

2mm × 3.1mm

(1)

For more information, see Section 11.

(2)

The package size (length × width) is a nominal value and

includes pins, where applicable.

SN74LVC2T45-Q1

SCES818C – SEPTEMBER 2010 – REVISED JULY 2024

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.