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PCT2075DP Datasheet(PDF) 11 Page - NXP Semiconductors |
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PCT2075DP Datasheet(HTML) 11 Page - NXP Semiconductors |
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11 / 37 page ![]() PCT2075 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved. Product data sheet Rev. 9.1 — 21 April 2017 11 of 37 NXP Semiconductors PCT2075 I2C-bus Fm+ digital temperature sensor and thermal watchdog 7.4.2 Configuration register The Configuration register (Conf) is a write/read register and contains an 8-bit non-complement data byte that is used to configure the device for different operation conditions. Table 10 shows the bit assignments of this register. 7.4.3 Temperature register The Temperature register (Temp) holds the digital result of temperature measurement or monitor at the end of each analog-to-digital conversion. This register is read-only and contains two 8-bit data bytes consisting of one Most Significant Byte (MSByte) and one Least Significant Byte (LSByte). However, only 11 bits of those two bytes are used to store the Temp data in two’s complement format with the resolution of 0.125 C. Table 11 shows the bit arrangement of the Temp data in the data bytes. When reading register Temp, all 16 bits of the two data bytes (MSByte and LSByte) are provided to the bus and should be all collected by the controller for a valid temperature reading. However, only the 11 most significant bits should be used, and the five least significant bits of the LSByte are zero and should be ignored. One of the ways to calculate the Temp value in C from the 11-bit Temp data is: 1. If the Temp data MSByte bit D10 = 0, then the temperature is positive and Temp value ( C) = +(Temp data) 0.125 C. 2. If the Temp data MSByte bit D10 = 1, then the temperature is negative and Temp value ( C) = (two’s complement of Temp data) 0.125 C. Table 10. Conf register Legend: * = default value. Bit Symbol Access Value Description B[7:5] reserved R/W 000* unused; any value written to these bits does not affect operation B[4:3] OS_F_QUE[1:0] R/W OS fault queue programming 00* queue value = 1 01 queue value = 2 10 queue value = 4 11 queue value = 6 B2 OS_POL R/W OS polarity selection 0* OS active LOW 1 OS active HIGH B1 OS_COMP_INT R/W OS operation mode selection 0* OS comparator 1 OS interrupt B0 SHUTDOWN R/W device operation mode selection 0* normal 1 shutdown Table 11. Temp register MSByte LSByte 76 54 32 10 76 54 32 10 D10 D9 D8D7 D6D5 D4D3 D2D1D0 X X X X X |
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