LSP5502

2A Synchronous Step Down DC/DC Converter

6/11

Rev. 1.7

www.liteon-semi.com

Stability Compensation

CCOMP2 is needed only for high ESR output capacitor

Figure 2. Stability Compensation

The feedback loop of the IC is stabilized by the components at the COMP pin, as shown in Figure 2. The DC loop

gain of the system is determined by the following equation:

(4)

The dominant pole P1 is due to CCOMP:

COMP

VEA

EA

1

P

C

A

π

2

G

f

=

(5)

The second pole P2 is the output pole:

OUT

OUT

OUT

2

P

C

V

π

2

I

f

=

(6)

The first zero Z1 is due to RCOMP and CCOMP:

COMP

COMP

1

Z

C

R

π

2

1

f

=

(7)

And finally, the third pole is due to RCOMP and CCOMP2 (if CCOMP2 is used):

2

COMP

COMP

3

P

C

R

π

2

1

f

=

(8)

The following steps should be used to compensate the IC:

STEP1. Set the crossover frequency at 1/10 of the switching frequency via RCOMP:

(9)

but limit RCOMP to 10kΩ maximum.

STEP2. Set the zero fZ1 at 1/4 of the crossover frequency. If RCOMP is less than 10kΩ, the equation for CCOMP is:

)

F

(

R

10

8

.

1

C

COMP

5

COMP

−

×

=

(10)

If RCOMP is limited to 10kΩ, then the actual crossover frequency is 10/ (VOUTCOUT). Therefore:

)

F

(

C

V

10

2

.

1

C

OUT

OUT

5

COMP

−

×

=

(11)

STEP3. If the output capacitor’s ESR is high enough to cause a zero at lower than 4 times the crossover frequency,

an additional compensation capacitor CCOMP2 is required. The condition for using CCOMP2 is:

ESRCOUT

R

)

(

V

012

.

0

,

C

10

1

.

1

Min

OUT

OUT

6

Ω

⎟

⎟

⎠

⎞

⎜

⎜

⎝

⎛

•

×

≥

−

(12)

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