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ABSOLUTE MAXIMUM RATINGS

(1)

ELECTRICAL CHARACTERISTICS

DAC8554

SLAS431B – JUNE 2005 – REVISED OCTOBER 2006

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be

more susceptible to damage because very small parametric changes could cause the device not to meet its published

specifications.

PACKAGING/ORDERING INFORMATION(1)

MAXIMUM

MAXIMUM

RELATIVE

DIFFERENTIAL

SPECIFIED

ACCURACY

NONLINEARITY

PACKAGE-

PACKAGE

TEMPERATURE

PACKAGE

ORDERING

TRANSPORT

PRODUCT

(LSB)

(LSB)

LEAD

DESIGNATOR

RANGE

MARKING

NUMBER

MEDIA, QUANTITY

DAC8554IPW

Tube, 90

DAC8554

±12

±1

TSSOP-16

PW

–40

°C to +105°C

D8554

DAC8554IPWR

Tape and Reel, 2000

(1)

For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

UNIT

AVDD to GND

–0.3V to 6V

Digital input voltage to GND

–0.3 V to AVDD + 0.3V

VO(A) to VO(D) to GND

–0.3V to AVDD + 0.3V

Operating temperature range

–40

°C to +105°C

Storage temperature range

–65

°C to +150°C

Junction temperature range (TJ max)

150

°C

Power dissipation

(TJmax – TA)/θJA

θ

JA Thermal impedance

118

°C/W

θ

JC Thermal impedance

29

°C/W

Human body model (HBM)

1500V

ESD rating

Charged device model (CDM)

1000V

(1)

Stresses above those listed under absolute maximum ratings may cause permanent damage to the device. Exposure to absolute

maximum conditions for extended periods may affect device reliability.

V

DD = 2.7V to 5.5V,– 40°C to +105°C range (unless otherwise noted).

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

STATIC PERFORMANCE(1)

Resolution

16

Bits

Relative accuracy

Measured by line passing through codes 485 and 64741

±4

±12

LSB

Differential nonlinearity

16-bit monotonic

±0.25

±1

LSB

Zero-scale error

Measured by line passing through codes 485 and 64741

±2

±12

mV

Zero-scale error drift

±5

µV/°C

Full-scale error

±0.3

±0.5

% of FSR

Measured by line passing through codes 485 and 64741,

(AVDD = 5V, VREF = 4.99V) and (AVDD = 2.7V, VREF = 2.69V)

Gain error

±0.05

±0.15

% of FSR

ppm of

Gain temperature coefficient

±1

FSR/

°C

PSRR

Power-Supply Rejection Ratio RL = 2kΩ, CL = 200pF

0.75

mV/V

OUTPUT CHARACTERISTICS(2)

Output voltage range

0

VREFH

V

To

±0.003% FSR, 0200h to FD00h, R

L = 2kΩ,

8

10

µs

0pF < CL < 200pF

Output voltage settling time

RL = 2kΩ, CL = 500pF

12

µs

(1)

Linearity calculated using a reduced code range of 485 to 64741; output unloaded.

(2)

Ensured by design and characterization; not production tested.

2

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