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LP8552TLE-E04/NOPB Datasheet(PDF) 26 Page - Texas Instruments |
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LP8552TLE-E04/NOPB Datasheet(HTML) 26 Page - Texas Instruments |
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26 / 49 page  EEPROM NVM 8 x 8 bits REGISTERS ADDRESS 00h...72h Startup or EE_READ=1 User Device Control EEPROM REGISTERS Address A0h...A7h EE_PROG = 1 Device Control LP8552 SNVS693E – SEPTEMBER 2011 – REVISED SEPTEMBER 2014 www.ti.com Figure 26. EEPROM Control Structure 8.6 Register Maps Table 6. Register Map ADDR REGISTER D7 D6 D5 D4 D3 D2 D1 D0 DEFAULT 00H Brightness BRT[7:0] 0000 0000 Control 01H Device Control BRT_MODE[1:0] BL_CTL 0000 0000 02H Fault OPEN SHORT 2_CHANNE 1_CHANNEL BL_FAULT OCP TSD UVLO 0000 0000 LS 03H ID PANEL MFG[3:0] REV[2:0] 1111 1100 04H Direct Control OUT[6:1] 0000 0000 05H Temp MSB TEMP[10:3] 0000 0000 06H Temp LSB TEMP[2:0] 0000 0000 72H EEPROM_cont EE_READY EE_INIT EE_PROG EE_READ 0000 0000 rol 26 Submit Documentation Feedback Copyright © 2011–2014, Texas Instruments Incorporated Product Folder Links: LP8552 |
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