Vlterm

50 W

50 W

VD+

VID

Receiver

Driver

Y

Z

0.5pF

VZ

VY

100pF

100pF

50 W

50 W

0Vto2V

VD+

VD-

V

=V

-V

V

=2*(max(|V

-V |)

V

=(V

+V )

2

ID

D+

D- ;

PP

D+

D-

ICM

D+

D-

V

=V -V

V

=2*(max(|V -V |)

V

=(V +V )

2

OD

Y

X

O(PP)

Y

Z

OC

Y

Z

Input

Output

tR/FDP

DVI/O

DVI/O

InputEdgeRate

20%to80%

80ps

ML_INx+

ML_INx-

0V

0V

MainLink

Input

MainLink

Output

tPD(ML)

tPD(ML)

SN75DP118

SLLS916B – SEPTEMBER 2008 – REVISED APRIL 2009 ................................................................................................................................................ www.ti.com

Figure 6. Main Link Test Circuit

Figure 7. Main Link

ΔVI/O and Edge Rate Measurements

Figure 8. Main Link Delay Measurements

8

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Product Folder Link(s): SN75DP118