9 Application and Implementation

Note

Information in the following applications sections is not part of the TI component specification, and TI

does not warrant its accuracy or completeness. TI’s customers are responsible for determining

suitability of components for their purposes. Customers should validate and test their design

implementation to confirm system functionality.

9.1 Application Information

In this application, the CD74HC02 is used to create an active-low SR latch. The two additional gates can be

used for a second active-low SR latch, individually used for their logic function, or the inputs can be grounded

and both channels left unused. This device is used to drive the tamper indicator LED and provide one bit of data

to the system controller. When the tamper switch outputs LOW, the output Q becomes HIGH. This output

remains HIGH until the system controller addresses the event and sends a LOW signal to the R input which

returns the Q output back to LOW.

9.2 Typical Application

System

Controller

Tamper

Switch

R

S

Q

R1

Tamper

Indicato r

R2

Figure 9-1. Typical application diagram

9.2.1 Design Requirements

9.2.1.1 Power Considerations

Ensure the desired supply voltage is within the range specified in the Recommended Operating Conditions. The

supply voltage sets the device's electrical characteristics as described in the Electrical Characteristics.

The positive voltage supply must be capable of sourcing current equal to the total current to be sourced by all

outputs of the CD74HC02 plus the maximum static supply current, ICC, listed in Electrical Characteristics and

any transient current required for switching. The logic device can only source as much current as is provided by

the positive supply source. Be sure not to exceed the maximum total current through VCC listed in the Absolute

Maximum Ratings.

The ground must be capable of sinking current equal to the total current to be sunk by all outputs of the

CD74HC02 plus the maximum supply current, ICC, listed in Electrical Characteristics, and any transient current

required for switching. The logic device can only sink as much current as can be sunk into its ground connection.

Be sure not to exceed the maximum total current through GND listed in the Absolute Maximum Ratings.

The CD74HC02 can drive a load with a total capacitance less than or equal to 50 pF while still meeting all of the

datasheet specifications. Larger capacitive loads can be applied, however it is not recommended to exceed 50

pF.

The CD74HC02 can drive a load with total resistance described by RL ≥ VO / IO, with the output voltage and

current defined in the Electrical Characteristics table with VOH and VOL. When outputting in the high state, the

output voltage in the equation is defined as the difference between the measured output voltage and the supply

voltage at the VCC pin.

CD54HC02, CD74HC02

SCHS125D – MARCH 1998 – REVISED DECEMBER 2020

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