7 Detailed Description

7.1 Overview

The ’HC573 devices are octal transparent D-type latches designed for 2-V to 6-V VCC operation.

When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs

are latched at the logic levels of the D inputs.

A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high

or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus

lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without

interface or pullup components.

OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered

while the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

7.2 Functional Block Diagram

7.3 Device Functional Modes

Table 7-1. Function Table

(each latch)

INPUTS

OUTPUTQ

OE

LE

D

L

H

H

H

L

H

L

L

L

L

X

Q0

H

X

X

Z

CD54HC573, CD74HC573

SCLS454C – FEBRUARY 2001 – REVISED MAY 2022

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