LM5035CSQXSLASHNOPB datasheet(20/43 Pages) TI2

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LM5035C

SNVS631D – JANUARY 2010 – REVISED OCTOBER 2016

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Feature Description (continued)

The SR1 and SR2 outputs are powered directly by the 5-V reference regulator. Each output is capable of

sourcing 0.09 A and sinking 0.2-A peak. The SR1 and SR2 signals can control SR MOSFET gate drivers through

a digital isolator. The actual gate sourcing and sinking currents are provided by the secondary-side bias supply

and gate drivers.

The timing of SR1 and SR2 with respect to HO and LO is shown in Figure 14. SR1 is configured out of phase

with HO and SR2 is configured out of phase with LO. The dead time between transitions is programmable by a

resistor connected from the DLY pin to the AGND pin. Typically, RDLY is set in the range of 10 kΩ to 100 kΩ. The

dead-time periods can be calculated using Equation 4 and Equation 5.

T1 = 0.003 × RDLY + 4.6 ns

(4)

T2 = 0.0007 × RDLY + 10.01 ns

(5)

When UVLO falls below 1.25 V, or during hiccup current limit, both SR1 and SR2 are held low. During normal

operation, if soft start is held low, both SR1 and SR2 will be high.

8.3.13 Thermal Protection

Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event the maximum rated

junction temperature is exceeded. When activated, typically at 165°C, the controller is forced into a low-power

standby state with the output drivers (HO, LO, SR1, and SR2), the bias regulators (VCC and REF) disabled. This

helps to prevent catastrophic failures from accidental device overheating. During thermal shutdown, the soft-start

capacitor is fully discharged and the controller follows a normal start-up sequence after the junction temperature

falls to the operating level (145°C).

8.4 Device Functional Modes

The LM5035C can be used as a half-bridge PWM controller or as a push-pull PWM controller. To implement the

LM5035C in a push-pull application, the HB pin is connected to VCC and the HS pin is connected to PGND. The

LM5035C will deliver 180º out-of-phase ground-referenced PWM signals to the gates of the power MOSFETS.

The high-side driver has an HS-to-GND maximum voltage rating of 105 V, but in higher-voltage applications the

high-side MOSFET can be driven with a gate-drive transformer.

LM5035CSQX/NOPB Datasheet(PDF) 20 Page - Texas Instruments