LMH6714

2

OUTPUT

20 MHz,

0.1 VPP

-5V

R1

20:

3

1

6

7

4

RF

LMH6609

LMH6714

LMH6504

RG

100:

R10

500:

R9

4.22 k:

1N5712

SCHOTTKY

R2

25:

C1

1.0 µF

C2

680 pF

C3

40 pF

+

+

+

+

-

-

-

-

VIN

INCLUDES SCOPE

PROBE CAPACITANCE

R6

300:

R5

25:

R3

300:

R4

300:

R7

300:

R8

500:

U4

U3

U2

U1

LMH6504

www.ti.com

SNOSA96D – NOVEMBER 2003 – REVISED MARCH 2013

AUTOMATIC GAIN CONTROL (AGC) #1

Fast Response AGC Loop

The AGC circuit shown in Figure 49 will correct a 6 dB input amplitude step in 100 ns. The circuit includes a two

op-amp precision rectifier amplitude detector (U1 and U2), and an integrator (U3) to provide high loop gain at low

frequencies. The output amplitude is set by R9. Some notes on building fast AGC loops: Precision rectifiers work

best with large output signals. Accuracy is improved by blocking DC offsets, as shown in Figure 49.

Figure 49. Automatic Gain Control Circuit #1

Signal frequencies must not reach the gain control port of the LMH6504, or the output signal will be distorted

(modulated by itself). A fast settling AGC needs additional filtering beyond the integrator stage to block signal

frequencies. This is provided in Figure 49 by a simple R-C filter (R10 and C3); better distortion performance can

be achieved with a more complex filter. These filters should be scaled with the input signal frequency. Loops with

slower response time (longer integration time constants) may not need the R10 – C3 filter.

Checking the loop stability can be done by monitoring the VG voltage while applying a step change in input signal

amplitude. Changing the input signal amplitude can be easily done with an arbitrary waveform generator.

AUTOMATIC GAIN CONTROL (AGC) #2

Figure 50 illustrates an automatic gain control circuit that employs two LMH6504’s. In this circuit, U1 receives the

input signal and produces an output signal of constant amplitude. U2 is configured to provide negative feedback.

U2 generates a rectified gain control signal that works against an adjustable bias level which may be set by the

potentiometer and RB. CI integrates the bias and negative feedback. The resultant gain control signal is applied

to the U1 gain control input VG. The bias adjustment allows the U1 output to be set at an arbitrary level less than

the maximum output specification of the amplifier. Rectification is accomplished in U2 by driving both the

amplifier input and the gain control input with the U1 output signal. The voltage divider that is formed by R1 and

R2, sets the rectifier gain.

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