STM32U073RCI3 datasheet(82/146 Pages) STMICROELECTRONICS

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Table 62. Electrical sensitivities

Symbol

Parameter

Conditions

Class

Static latch-up class

TA = +130 °C conforming to JESD78A

6.3.13

I/O current injection characteristics

As a general rule, current injection to the I/O pins, due to external voltage below VSS or above VDDIOx (for

standard, 3.3 V-capable I/O pins) should be avoided during normal product operation. However, in order to give

an indication of the robustness of the microcontroller in cases when abnormal injection accidentally happens,

susceptibility tests are performed on a sample basis during device characterization.

Functional susceptibility to I/O current injection

While a simple application is executed on the device, the device is stressed by injecting current into the I/O pins

programmed in floating input mode. While current is injected into the I/O pin, one at a time, the device is checked

for functional failures.

The failure is indicated by an out of range parameter: ADC error above a certain limit (higher than 5 LSB TUE),

out of conventional limits of induced leakage current on adjacent pins (out of the 5 µA/+0 µA range) or other

functional failure (for example reset occurrence or oscillator frequency deviation).

The characterization results are given in Table 63. I/O current injection susceptibility.

Negative induced leakage current is caused by negative injection and positive induced leakage current is caused

by positive injection.

Table 63. I/O current injection susceptibility

Evaluated by characterization, not tested in production.

Symbol

Description

Functional susceptibility

Unit

Negative injection

Positive injection

IINJ

Injected current on all pins except PA4, PA5

-5

N/A(1)

Injected current on PA4, PA5 pins

-5

1. Injection is not possible.

6.3.14

I/O port characteristics

General input/output characteristics

Unless otherwise specified, the parameters given in Table 64. I/O static characteristics are derived from tests

performed under the conditions summarized in Section 6.3.1: General operating conditions. All I/Os are designed

as CMOS- and TTL-compliant.

Note:

For information on GPIO configuration, refer to the application note AN4899 “STM32 GPIO configuration for

hardware settings and low-pow er consumption” available from the ST website www.st.com.

Table 64. I/O static characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIL(1)

I/O input low level voltage

1.62 V < VDDIOx < 3.6 V

0.3 x VDDIOx (2)

I/O input low level voltage

1.62 V < VDDIOx < 3.6 V

0.39 x VDDIOx -

0.06(3)

VIH(1)

I/O input high level voltage

1.62 V < VDDIOx < 3.6 V

0.7 x VDDIOx (2)

I/O input high level voltage

1.62 V < VDDIOx < 3.6 V

0.49 x VDDIOX + 0.26 (3)

Vhys(3)

TT_xx, FT_xxx and NRST

I/O input hysteresis

1.62 V < VDDIOx < 3.6 V

200

Ilkg(4)

FT_xx input leakage

current(3)(5)

VIN ≤ Max(VDDXXX)(6)(7)

±100

STM32U073x8/B/C

Electrical characteristics

DS14548 - Rev 2

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