©2008 Fairchild Semiconductor Corporation

FQD2P40 Rev. 1.3

www.fairchildsemi.com

6

Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

••

DUT

DUT

V

VDS

DS

++

__

Driv

Driver

er

R

RGG

Com

Compplliim

ment

ent of

of DUT

DUT

(N-

(N-C

Channel

hannel))

V

VGS

GS

•• ddvv//dt

dt ccoont

ntrroolllleedd bbyy R

RGG

IISD

SD c

con

onttrrol

ollled

ed by

by pu

pullssee pe

perriiod

od

V

VDD

DD

LLL

II SD

SD

10

10V

V

VVGS

GS

(( Driv

Driver

er ))

II SD

SD

(( DUT

DUT ))

VVDS

DS

(( DUT

DUT ))

V

VDD

DD

Bo

Body

dy D

Diiooddee

For

Forw

ward

ard V

Vol

olttag

agee Dr

Drop

op

IIFM

FM ,, Bo

Body

dy D

Diiod

odee FFor

orw

waarrdd C

Cuurrrren

entt

V

VSD

SD

Bo

Body

dy D

Diiod

odee R

Reevveerrssee C

Cuurrrren

entt

IIRM

RM

Bo

Body

dy Di

Diod

odee R

Reecov

coveerryy dv

dv/d

/dtt

di

di//dt

dt

D

D

D === ---------

Gate

Gate

Gate

---------

---------

---------

P

P

Pul

ul

ulsss

--------

--------

--------

eee W

W

Wiiiddd

-----

-----

-----

ttthhh---

Ga

Ga

Gate

te

te Pu

Pu

Pulllssseee Pe

Pe

Perrriiiod

od

od