7 Detailed Description

7.1 Overview

The ’HC251 and ’HCT251 are 8-channel digital multiplexers with three-state outputs, fabricated with high-speed

silicongate CMOS technology. Together with the low power consumption of standard CMOS integrated circuits,

they possess the ability to drive 10 LSTTL loads. The three-state feature makes them ideally suited for

interfacing with bus lines in a bus-oriented system.

This multiplexer features both true (Y) and complement (Y) outputs as well as an output enable (OE) input.

The OE must be at a low logic level to enable this device. When the OE input is high, both outputs are in

the high-impedance state. When enabled, address information on the data select inputs determines which data

input is routed to the Y and Y outputs. The ’HCT251 logic family is speed, function, and pin-compatible with the

standard ’LS251.

7.2 Functional Block Diagram

S0

S1

S2

I0

I1

I2

I3

I4

I5

I6

I7

Y

Y

OE

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CD54HC251, CD74HC251, CD54HCT251, CD74HCT251

SCHS169D – NOVEMBER 1998 – REVISED MARCH 2022

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