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DAC7562SDGST Datasheet(PDF) 39 Page - Texas Instruments |
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DAC7562SDGST Datasheet(HTML) 39 Page - Texas Instruments |
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39 / 63 page ![]() ( ) REF _ MAX REF _ MIN 6 REF RANGE V V Drift Error 10 ppm / C V T - æ ö = ´ ° ç ÷ ç ÷ ´ è ø V A OUT V B OUT GND LDAC CLR 1 2 3 4 5 6 7 8 9 10 SYNC SYNC SCLK SCLK D IN D IN AV DD AV DD V /V REFIN REFOUT V / V REFIN REFOUT 1 2 3 4 5 6 7 8 9 10 V A OUT V B OUT GND LDAC CLR AV DD AV DD 1 F m 1 F m 150 nF 150 nF DGS DSC DAC7562, DAC7563, DAC8162 DAC8163, DAC8562, DAC8563 www.ti.com SLAS719E – AUGUST 2010 – REVISED JUNE 2015 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information 9.1.1 DAC Internal Reference The internal reference of the DAC756x, DAC816x, and DAC856x devices does not require an external load capacitor for stability because it is stable without any capacitive load. However, for improved noise performance, an external load capacitor of 150 nF or larger connected to the VREFIN/VREFOUT output is recommended. Figure 94 shows the typical connections required for operation of the DAC756x, DAC816x, and DAC856x internal reference. A supply bypass capacitor at the AVDD input is also recommended. Figure 94. Typical Connections for Operating the DAC756x, DAC816x, and DAC856x Internal Reference 9.1.1.1 Supply Voltage The internal reference features an extremely low dropout voltage. It can be operated with a supply of only 5 mV above the reference output voltage in an unloaded condition. For loaded conditions, see the Load Regulation section. The stability of the internal reference with variations in supply voltage (line regulation, dc PSRR) is also exceptional. Within the specified supply voltage range of 2.7 V to 5.5 V, the variation at VREFIN/VREFOUT is typically 50 μV/V; see Figure 7. 9.1.1.2 Temperature Drift The internal reference is designed to exhibit minimal drift error, defined as the change in reference output voltage over varying temperature. The drift is calculated using the box method described by Equation 3: (3) where: VREF_MAX = maximum reference voltage observed within temperature range TRANGE. VREF_MIN = minimum reference voltage observed within temperature range TRANGE. VREF = 2.5 V, target value for reference output voltage. TRANGE = the characterized range from –40°C to 125°C (165°C range) The internal reference features an exceptional typical drift coefficient of 4 ppm/°C from –40°C to 125°C. Characterizing a large number of units, a maximum drift coefficient of 10 ppm/°C is observed. Temperature drift results are summarized in Figure 3. Copyright © 2010–2015, Texas Instruments Incorporated Submit Documentation Feedback 39 Product Folder Links: DAC7562 DAC7563 DAC8162 DAC8163 DAC8562 DAC8563 |
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