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CD54HC125 Datasheet(PDF) 3 Page - Texas Instruments |
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CD54HC125 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 26 page ![]() 5 Pin Configuration and Functions 1OE 1A 1Y 2OE 2A 2Y GND V CC 4OE 4A 4Y 3OE 3A 3Y 1 2 3 4 5 6 7 14 13 12 11 10 9 8 Figure 5-1. D, N, or J Package 14-Pin SOIC, PDIP, or CDIP Top View Pin Functions PIN I/O DESCRIPTION NAME NO. 1 OE 1 Input Channel 1, Output Enable, Active Low 1A 2 Input Channel 1, Input A 1Y 3 Output Channel 1, Output Y 2 OE 4 Input Channel 2, Output Enable, Active Low 2A 5 Input Channel 2, Input A 2Y 6 Output Channel 2, Output Y GND 7 — Ground 3Y 8 Output Channel 3, Output Y 3A 9 Input Channel 3, Input A 3 OE 10 Input Channel 3, Output Enable, Active Low 4Y 11 Output Channel 4, Output Y 4A 12 Input Channel 4, Input A 4 OE 13 Input Channel 4, Output Enable, Active Low VCC 14 — Positive Supply www.ti.com CD74HC125, CD54HC125 SCHS143D – NOVEMBER 1997 – REVISED APRIL 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: CD74HC125 CD54HC125 |
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