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CDCLVD2106RHAT Datasheet(PDF) 2 Page - Texas Instruments |
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CDCLVD2106RHAT Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 20 page ![]() Reference Generator LVDS GND OUTN [0..5] OUTP [0..5] LVDS OUTN [6..11] OUTP [6..11] GND VCC VCC VCC VCC VCC VCC VCC VAC_REF0 INP0 INN0 INP1 INN1 EN 200 kW 200 kW VAC_REF1 6mmx 6mm 40 pinQFN (RHA) ThermalPad (GND) 2 3 4 5 6 7 1 24 23 22 21 27 26 25 VCC OUTP8 OUTN9 OUTP9 OUTN8 OUTN0 OUTP0 VCC OUTN10 OUTP10 8 9 10 OUTN1 OUTP1 OUTN2 OUTP2 OUTN3 OUTP3 VCC 30 29 28 VCC OUTN11 OUTP11 11 12 13 14 15 16 17 37 36 35 34 33 32 31 18 19 20 40 39 38 CDCLVD2106 SCAS902B – SEPTEMBER 2010 – REVISED JANUARY 2011 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Figure 2. CDCLVD2106 Block Diagram 2 Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): CDCLVD2106 |
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