VNH2SP30TR-E datasheet(7/35 Pages) STMICROELECTRONICS

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DocID10832 Rev 10

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VNH2SP30-E

Block diagram and pin description

Table 4. Pin functions description

Name

Description

VCC

Battery connection

GNDA, GNDB Power grounds; must always be externally connected together

OUTA, OUTB Power connections to the motor

INA, INB

Voltage controlled input pins with hysteresis, CMOS compatible. These two pins

control the state of the bridge in normal operation according to the truth table (brake

to VCC, brake to GND, clockwise and counterclockwise).

PWM

Voltage controlled input pin with hysteresis, CMOS compatible. Gates of low side

FETs are modulated by the PWM signal during their ON phase allowing speed control

of the motor.

ENA/DIAGA,

ENB/DIAGB

Open drain bidirectional logic pins. These pins must be connected to an external pull

up resistor. When externally pulled low, they disable half-bridge A or B. In case of

fault detection (thermal shutdown of a high side FET or excessive ON state voltage

drop across a low side FET), these pins are pulled low by the device (see truth table

in fault condition).

Analog current sense output. This output sources a current proportional to the motor

current. The information can be read back as an analog voltage across an external

resistor.

VNH2SP30TR-E Datasheet(PDF) 7 Page - STMicroelectronics