R3

R1

R2

R4

15 V

VREF

12 V

+

+

VIN

+

VDIFF

±

VOUT-

VOUT+

NE5532, NE5532A, SA5532, SA5532A

SLOS075J – NOVEMBER 1979 – REVISED JANUARY 2015

www.ti.com

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

9.1 Typical Application

Some applications require differential signals. Figure 4 shows a simple circuit to convert a single-ended input of 2

V to 10 V into differential output of ±8 V on a single 15-V supply. The output range is intentionally limited to

maximize linearity. The circuit is composed of two amplifiers. One amplifier acts as a buffer and creates a

voltage, VOUT+. The second amplifier inverts the input and adds a reference voltage to generate VOUT–. Both

VOUT+ and VOUT– range from 2 V to 10 V. The difference, VDIFF, is the difference between VOUT+ and VOUT–.

Figure 4. Schematic for Single-Ended Input to Differential Output Conversion

9.1.1 Design Requirements

The design requirements are as follows:

•

Supply voltage: 15 V

•

Reference voltage: 12V

•

Input: 2 V to 10 V

•

Output differential: ±8 V

8

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