PCM5102APWG4 datasheet(29/44 Pages) TI2

Part #	PCM5102APWG4

Description	PCM510xA 2.1 VRMS, 112/106/100 dB Audio Stereo DAC with PLL and 32-bit, 384 kHz PCM Interface

PDF	44 Pages

Scroll/Zoom	100%

Manufacturer	TI2 [Texas Instruments]

Direct Link	https://www.ti.com

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29 / 44 page

3.3V

XSMT

I2S Clocks

SCK, BCK, LRCK

3 ms

VDD

High

Low

High

Low

Time

3.3V

XSMT

S Clocks

SCK, BCK, LRCK

150t + 0.2ms

VDD

High

Low

High

Low

Time

PCM5100A, PCM5101A, PCM5102A

PCM5100A-Q1, PCM5101A-Q1, PCM5102A-Q1

www.ti.com

SLAS859C – MAY 2012 – REVISED MAY 2015

Recommended Powerdown Sequence (continued)

Figure 36. Assert XSMT

2. Stop I2S clocks (SCK, BCK, LRCK) 3 ms before powerdown as shown in Figure 37.

Figure 37. Stop I2C Clocks

11.2.2 Unplanned Shutdown

Many systems use a low-noise regulator to provide an AVDD 3.3-V supply for the DAC. The XSMT Pin can take

advantage of such a feature to measure the pre-regulated output from the system SMPS to mute the output

before the entire SMPS discharges. Figure 38 shows how to configure such a system to use the XSMT pin. The

XSMT pin can also be used in parallel with a GPIO pin from the system microcontroller/DSP or power supply.

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Product Folder Links: PCM5100A PCM5101A PCM5102A PCM5100A-Q1 PCM5101A-Q1 PCM5102A-Q1

PCM5102APWG4 Datasheet(PDF) 29 Page - Texas Instruments