© 2002 Fairchild Semiconductor Corporation

www.fairchildsemi.com

LMV321 / LMV358 / LMV324 Rev. 2.10

4

Electrical Specifications

TC = 25°C, VS = +2.7 V, G = 2, RL = 10 kΩ to VS/2, Rf = 10 kΩ, VO(DC) = VCC/2, unless otherwise noted.

Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality

levels are determined from tested parameters.

Notes:

1. Guaranteed by testing or statistical analysis at +25

°C.

2. +IN and -IN are gates to CMOS transistors with typical input bias current of <1 nA. CMOS leakage is too small to

practically measure.

Parameter

Conditions

Min.

Typ.

Max.

Unit

AC Performance

Gain Bandwidth Product

CL= 50 pF, RL= 2 kΩ to VS/2

1.2

MHz

Phase Margin

52

deg

Gain Margin

17

dB

Slew Rate

VO = 1VPP

1.5

V/

μs

Input Voltage Noise

>50 kHz

36

nV/

√Hz

Crosstalk

LMV358

100 kHz

91

dB

LMV324

100 kHz

80

DC Performance

Input Offset Voltage(1)

1.7

7.0

mV

Average Drift

8

μV/°C

Input Bias Current(2)

<1

nA

Input Offset Current(2)

<1

nA

Power Supply Rejection Ratio(1)

DC

50

65

dB

Supply Current (Per Channel)(1)

80

120

μA

Input Characteristics

Input Common Mode Voltage Range(1)

LO

0

-0.25

V

HI

1.5

1.3

Common Mode Rejection Ratio(1)

50

70

dB

Output Characteristics

Output Voltage Swing

RL= 10 kΩ to VS/2; LO

(1)

0.01

0.10

V

RL= 10 kΩ to VS/2; HI

(1)

2.60

2.69