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SN74LVC04APWR Datasheet(PDF) 12 Page - Texas Instruments |
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SN74LVC04APWR Datasheet(HTML) 12 Page - Texas Instruments |
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12 / 42 page ![]() 0.1 µF 3.3V regulated 1.8V or 3.3V accessory Copyright © 2016, Texas Instruments Incorporated 12 SN54LVC04A, SN74LVC04A SCAS281T – JANUARY 1993 – REVISED NOVEMBER 2016 www.ti.com Product Folder Links: SN54LVC04A SN74LVC04A Submit Documentation Feedback Copyright © 1993–2016, Texas Instruments Incorporated 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information SN74LVC04A is a low-drive CMOS device that can be used for a multitude of bus interface type applications where output ringing is a concern. The low drive and slow edge rates minimize overshoot and undershoot on the outputs. The inputs can accept voltages to 3.6 V at any valid VCC making it Ideal for down translation. 9.2 Typical Application Figure 3. Typical Application Schematic 9.2.1 Design Requirements This device uses CMOS technology and has balanced output drive. Take care to avoid bus contention, because it can drive currents that would exceed maximum limits. The high drive also creates fast edges into light loads, so routing and load conditions must be considered to prevent ringing. 9.2.2 Detailed Design Procedure Recommended Input Conditions: • For rise time and fall time specifications, see Δt/ΔV in Recommended Operating Conditions. • For specified high and low levels, see VIH and VIL in Recommended Operating Conditions. • Inputs are overvoltage tolerant allowing them to go as high as 3.6 V at any valid VCC. Recommend Output Conditions: • Load currents must not exceed 25 mA per output and 50 mA total for the part. • Outputs must not be pulled above VCC. |
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