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SN54LVC04A, SN74LVC04A

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SCAS281T – JANUARY 1993 – REVISED NOVEMBER 2016

Product Folder Links: SN54LVC04A SN74LVC04A

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Copyright © 1993–2016, Texas Instruments Incorporated

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.

(3)

The value of VCC is provided in Recommended Operating Conditions.

(4)

For the D package: above 70°C, the value of Ptot derates linearly with 8 mW/K.

(5)

For the DB, DGV, NS, and PW packages: above 60°C, the value of Ptot derates linearly with 5.5 mW/K.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1)

MIN

MAX

UNIT

Supply voltage, VCC

–0.5

6.5

V

Input voltage, VI

(2)

–0.5

6.5

V

Output voltage, VO

(2) (3)

–0.5

VCC + 0.5

V

Input clamp current, IIK

VI < 0

–50

mA

Output clamp current, IOK

VO < 0

–50

mA

Continuous output current, IO

±50

mA

Continuous current through VCC or GND

±100

mA

Power dissipation, Ptot

TA = –40°C to 125°C

(4) (5)

500

mW

Maximum virtual junction temperature, TJ(MAX)

150

°C

Storage temperature, Tstg

–65

150

°C

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

VALUE

UNIT

V(ESD) Electrostatic discharge

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)

±2000

V

Charged-device model (CDM), per JEDEC specification JESD22-C101(2)

±1000

Machine Model (MM)

±200

(1)

All unused inputs of the device must be held at VCC or GND to ensure proper device operation. See TI application report, Implications of

Slow or Floating CMOS Inputs (SCBA004).

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

(1)

MIN

MAX

UNIT

VCC

Supply voltage

Operating

SN54LVC04A

2

3.6

V

SN74LVC04A

1.65

3.6

Data retention only

1.5

VIH

High-level input voltage

VCC = 1.65 V to 1.95 V, SN74LVC04A only

0.65 × VCC

V

VCC = 2.3 V to 2.7 V, SN74LVC04A only

1.7

VCC = 2.7 V to 3.6 V

2

VIL

Low-level input voltage

VCC = 1.65 V to 1.95 V, SN74LVC04A only

0.35 × VCC

V

VCC = 2.3 V to 2.7 V, SN74LVC04A only

0.7

VCC = 2.7 V to 3.6 V

0.8

VI

Input voltage

0

5.5

V

VO

Output voltage

0

VCC

V

IOH

High-level output current

VCC = 1.65 V, SN74LVC04A only

–4

mA

VCC = 2.3 V, SN74LVC04A only

–8

VCC = 2.7 V

–12

VCC = 3 V

–24