ICS8308I datasheet(1/16 Pages) IDT

Part #	ICS8308I

Description	LOW SKEW, 1-TO-8 DIFFERENTIAL/LVCMOS-TO-LVCMOS FANOUT BUFFER

PDF	16 Pages

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Manufacturer	IDT [Integrated Device Technology]

Direct Link	http://www.idt.com

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LOW SKEW, 1-TO-8 DIFFERENTIAL/

LVCMOS-TO-LVCMOS FANOUT BUFFER

ICS8308I

IDT™ / ICS™ LVCMOS FANOUT BUFFER

1

ICS8308AGI REV. B OCTOBER 16, 2007

BLOCK DIAGRAM

PIN ASSIGNMENT

ICS8308I

24-Lead, 173-MIL TSSOP

4.4mm x 7.8mm x 0.925mm body package

G Package

Top View

Q0

GND

CLK_SEL

LVCMOS_CLK

CLK

nCLK

CLK_EN

OE

VDD

GND

Q1

VDDO

Q2

GND

Q3

VDDO

Q4

GND

Q5

VDDO

Q6

GND

Q7

GENERAL DESCRIPTION

The ICS8308I is a low-skew, 1-to-8 Fanout Buffer

and a member of the HiPerClockS™family of High

Perfor mance Clock Solutions from IDT. The

ICS8308I has two selectable clock inputs. The CLK,

nCLK pair can accept most differential input levels.

The LVCMOS_CLK can accept LVCMOS or LVTTL input levels.

The low impedance LVCMOS/LVTTL outputs are designed to

drive 50

Ω series or parallel terminated transmission lines. The

effective fanout can be increased from 8 to 16 by utilizing the

ability of the outputs to drive two series terminated trans-

mission lines.

The ICS8308I is characterized for 3.3V core/3.3V output,

3.3V core/2.5V output or 2.5V core/2.5V output operation.

Guaranteed output and part-part skew characteristics make

the 8308I ideal for those clock distribution applications requiring

well defined performance and repeatability.

FEATURES

• Eight LVCMOS/LVTTL outputs, (7Ω typical output impedance)

• Selectable LVCMOS_CLK or differential CLK, nCLK inputs

• CLK, nCLK pair can accept the following differential

input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL

• Maximum Output Frequency: 350MHz

• Output Skew: (3.3V± 5%): 100ps (maximum)

• Part to Part Skew: (3.3V± 5%): 1ns (maximum)

• Supply Voltage Modes:

(Core/Output)

3.3V/3.3V

3.3V/2.5V

2.5V/2.5V

• -40°C to 85°C ambient operating temperature

• Available in both standard (RoHS 5) and lead-free (RoHS 6)

packages

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

Q0

Q1

Q2

Q3

Q4

Q5

Q6

Q7

LVCMOS_CLK

CLK

nCLK

CLK_SEL

CLK_EN

OE

D

LE

Q

1

0

Pullup

Pulldown

Pullup

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