8 Detailed Description

8.1 Overview

The SN74HCS365 hex buffers and line drivers are designed specifically to improve both the performance and

density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The

SN74HCS365 devices contain six independent buffers/drivers with dual-gated output-enable (OE1 and OE2)

inputs. When OE1 and OE2 are both low, each channel passes noninverted data from the A input to the Y

output. If either (or both) output-enable terminal(s) is high, the outputs are in the high-impedance state.

8.2 Functional Block Diagram

A2

A3

A1

OE2

Y1

Y2

Y3

A6

Y6

A4

A5

Y4

Y5

OE1

Figure 8-1. Logic Diagram (Positive Logic) for SN74HCS365

8.3 Feature Description

8.3.1 Balanced CMOS Push-Pull Outputs

This device includes balanced CMOS push-pull outputs. The term "balanced" indicates that the device can sink

and source similar currents. The drive capability of this device may create fast edges into light loads so routing

and load conditions should be considered to prevent ringing. Additionally, the outputs of this device are capable

of driving larger currents than the device can sustain without being damaged. It is important for the output power

of the device to be limited to avoid damage due to overcurrent. The electrical and thermal limits defined in the

Absolute Maximum Ratings must be followed at all times.

Unused push-pull CMOS outputs should be left disconnected.

8.3.2 CMOS Schmitt-Trigger Inputs

This device includes inputs with the Schmitt-trigger architecture. These inputs are high impedance and are

typically modeled as a resistor in parallel with the input capacitance given in the Electrical Characteristics table

from the input to ground. The worst case resistance is calculated with the maximum input voltage, given in the

Absolute Maximum Ratings table, and the maximum input leakage current, given in the Electrical Characteristics

table, using Ohm's law (R = V ÷ I).

The Schmitt-trigger input architecture provides hysteresis as defined by ΔVT in the Electrical Characteristics

table, which makes this device extremely tolerant to slow or noisy inputs. While the inputs can be driven much

slower than standard CMOS inputs, it is still recommended to properly terminate unused inputs. Driving the

inputs with slow transitioning signals will increase dynamic current consumption of the device. For additional

information regarding Schmitt-trigger inputs, please see Understanding Schmitt Triggers.

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SN74HCS365

SCLS837 – SEPTEMBER 2020

Copyright © 2020 Texas Instruments Incorporated

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Product Folder Links: SN74HCS365