SN74LVC1T45DBVT datasheet(16/42 Pages) TI2

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8.2.1.3 Application Curve

Figure 8-2. Translation Up (1.8V to 5V) at 2.5 MHz

8.2.2 Bidirectional Logic Level-Shifting Application

Figure 8-3 shows the SN74LVC1T45 being used in a bidirectional logic level-shifting application. Because the

SN74LVC1T45 does not have an output-enable (OE) pin, the system designer should take precautions to avoid

bus contention between SYSTEM-1 and SYSTEM-2 when changing directions.

VCC1

VCC2

SYSTEM-1

SYSTEM-2

DIR CTRL

I/O-1

VCC2

I/O-2

Pullup/Down

or Bus Hold(1)

Pullup/Down

or Bus Hold(1)

Figure 8-3. Bidirectional Logic Level-Shifting Application

8.2.2.1 Design Requirements

See Section 8.2.1.1.

8.2.2.2 Detailed Design Procedure

Table 8-2 shows data transmission from SYSTEM-1 to SYSTEM-2 and then from SYSTEM-2 to SYSTEM-1.

Table 8-2. SYSTEM-1 and SYSTEM-2 Data Transmission

STATE

DIR CTRL

I/O-1

I/O-2

DESCRIPTION

Out

SYSTEM-1 data to SYSTEM-2

Hi-Z

SYSTEM-2 is getting ready to send data to SYSTEM-1. I/O-1 and I/O-2 are disabled. The

bus-line state depends on pullup or pulldown.(1)

Hi-Z

DIR bit is flipped. I/O-1 and I/O-2 still are disabled. The bus-line state depends on pullup or

pulldown.(1)

Out

SYSTEM-2 data to SYSTEM-1

(1)

SYSTEM-1 and SYSTEM-2 must use the same conditions, that is, both pullup or both pulldown.

SN74LVC1T45

SCES515N – DECEMBER 2003 – REVISED JUNE 2024

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