STM32WBA62CI datasheet(68/185 Pages) STMICROELECTRONICS

68 / 185 page

Functional overview

STM32WBA6xxx

68/185

DS14736 Rev 1

3.35

USB on-the-go high-speed (USB OTG)

The devices embed an USB OTG high-speed device/host peripheral with integrated

transceivers. This peripheral is compliant with the USB 2.0 specification. It has software-

configurable endpoint setting, and supports suspend/resume.

This interface requires a precise 60 MHz clock that is generated from the internal USB OTG

HS PHY PLL (the clock source must use the HSE crystal oscillator).

The USB OTG HS features are:

•

USB-IF certified to the Universal Serial Bus Specification Rev 2.0

•

On-chip high-speed PHY

•

Full support (PHY)

–

Integrated support for A-B device identification (ID line)

–

Supports monitoring of VBUS levels with internal comparators

•

Software-configurable to operate as USB high-speed device/host role device

•

Supports HS/FS SOF and LS keep-alives with

–

SOF pulse PAD connectivity

–

SOF pulse internal connection to timer (TIMx)

–

Configurable framing period

–

Configurable end of frame interrupt

•

Internal DMA with thresholding support and software selectable AHB burst type in DMA

mode

•

Power saving features, such as system stop during USB OTG suspend, switch-off of

clock domains internal to the digital core, PHY and DFIFO power management

•

Dedicated RAM of 4 Kbytes with advanced FIFO control:

–

Configurable partitioning of RAM space into different FIFOs for flexible and

efficient use of RAM

–

Each FIFO able to hold multiple packets

–

Dynamic memory allocation

–

Configurable FIFO sizes that are not powers of two to allow the use of contiguous

memory locations

•

Max guaranteed USB bandwidth for up to one frame (1 ms) without system intervention

Host-mode features:

•

External charge pump for VBUS voltage generation

•

Up to 16 host channels (pipes): each channel is dynamically reconfigurable to allocate

any type of USB transfer

•

Built-in hardware scheduler holding:

FIFO size

X (8 words)

SPDIF

PDM

Table 21. SAI implementation (continued)

Features

SAI1

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