THP210DR datasheet(26/45 Pages) TI2

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9.1.7.2 Settling Time Driving the ADC Sample-and-Hold Operating Behavior

The RC filter between the amplifier and the ADC helps the amplifier drive the sampling capacitor during charging

(acquisition) and discharging (conversion) times. During the acquisition time, if the amplifier has a load transient

at the output, the time needed to recover (or settle) is commonly defined as the settling time. Typically, to

achieve minimal distortion, the end value to settle is within ½ of the ADC least significant bit (LSB).

The specified settling time of the FDA is the time required for the amplifier to recover from transients caused

at the THP210 output. Although the frequency response characteristics impact the settling time of the ADC

application, these characteristics are not the key element to consider. The settling time of the FDA to react to

load transients depends primarily on the output impedance of the amplifier at the required signal bandwidth.

Equation 5 calculates the settling time, considering the time constant of the RC combination:

settle

SET

(5)

where:

• N is the number of bits in the ADC application

• τ equals RF × CF

• SET = 2 for a settling of ½ LSB, SET = 4 for a settling of ¼ LSB, and so on.

In order to verify whether the chosen RC filter combination fulfills the settling behavior, simulate the desired

circuit with TINA-TI™ simulation software.

9.1.7.3 THD Performance

The input driver and the ADC both introduce harmonic distortion in the data acquisition block that generates

undesired signals in the output harmonically related to the input signal. Total harmonic distortion (THD) can be

very important in applications measuring ac signals. However, there are also ADC dc-measurement applications

that are only concerned with SNR and linearity. To make sure that the total system distortion performance is

not dominated by the front-end stage, the distortion of the driver circuitry must be at least 10 dB less than the

distortion of the ADC, as shown in Equation 6:

THDFDA ≤ THDADC – 10 dB

(6)

The harmonic distortion of an FDA mainly relates to the open-loop linearity in the output stage corrected by

the loop gain at the fundamental frequency. When the total load impedance decreases, including the effect of

the feedback resistors loadings, the output stage open-loop linearity degrades, and thus worsens the harmonic

distortion, as seen in Figure 6-10.

Another effect that results from the RC filter is that the load impedance changes over frequency, which also

influences the THD.

An additional dependency is given by the output voltage swing. Increasing the output voltage swing increases

the nonlinearities of the open-loop output stage, thus degrading the harmonic distortion.

In summary, the harmonic distortion is negatively affected not only with decreasing load impedance and

increasing output voltage swing, but also with increasing noise gain.

Section 9.2.2 provides an measurement results of the THD performance using the THP210 and the ADS891x

ADC series.

THP210

SBOS932C – JANUARY 2020 – REVISED MARCH 2021

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