TPS2480PW datasheet(16/60 Pages) TI2

16 / 60 page

TPS2480

TPS2481

SLUS939B – APRIL 2010 – REVISED DECEMBER 2010

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Action of the Constant Power Engine (Figure 13)

The calculated power dissipated in the external FET, VDS x ID, is computed under the same startup conditions as

Figure 12. The current of the external FET, labeled IIN, initially rises to the value that satisfies the constant power

engine; in this case it is 54 W / 48 V = 1.1 A. The 54-W value is programmed into the engine by setting the

PROG voltage using Equation 1. VDS of the external FET, which is calculated as V(SENSE-OUT) , falls as CO

charges, thus allowing the the external FET drain current to increase. This is the result of the internal constant

power engine adjusting the current limit reference to the GATE amplifier as CO charges and VDS falls. The

calculated device power in Figure 13, labeled MOSFET POWER, is seen to be flat-topped and constant within

the limitations of circuit tolerance and acquisition noise. A fixed current limit is implemented by clamping the

constant power engine output to 50 mV when VDS is low. This protection technique can be viewed as a

specialized form of foldback limiting; the benefit over linear foldback is that it yields the maximum output current

from a device over the full range of VDS and still protects the device.

Figure 13. Computation of the External FET Stress During Startup

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TPS2480PW Datasheet(PDF) 16 Page - Texas Instruments