Test Conditions

Val ue

Symbol

Parameter

Typ.

Max.

Unit

Propagation Delay Time :

Clock to Q,

Clock to Q

5

250

500

ns

10

110

220

15

90

180

Propagation Delay Time :

Clock to Q’

Clock to Q

5

190

380

ns

10

80

160

15

65

130

5

100

200

ns

10

50

100

15

40

80

5

100

200

ns

10

50

100

15

40

80

Q,

5

50

100

ns

10

25

50

15

20

40

Data Setup Time

5

30

60

ns

10

15

30

15

10

20

Data Hold Time

5

30

60

ns

10

15

30

15

10

20

Clock Pulse Width

5

120

240

ns

10

50

100

15

40

80

Maximum Clock Input

Frequency**

52

4

MHz

10

5

10

15

6

12

Clock Input Rise or Fall Time*

5

1000

µs

10

1000

15

200

*

If more than one unit is cascaded in the parallel clocked application, trCL should be made less than or equal to the sum of

the propagation delay at 50pF and the transmiti on time of the output driving stage.

*

* Maximum Clock Frequency for Cascaded Units;

a) Using Delayed Clock Feature in Recirculation Mode :

fmax =

1

(n-1) CLD prop. delay + Q prop. delay + set-up time

where n = nimber of packages

b) Not Usng Delaye Clock :

fmax =

1

propagation delay + set-up time

HCC/HCF4031B

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