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TVP5146M2IPFPR Datasheet(PDF) 45 Page - Texas Instruments

Part # TVP5146M2IPFPR
Description  NTSC/PAL/SECAM 4×10-Bit Digital Video Decoder With Macrovision™ Detection, YPbPr Inputs, 5-Line Comb Filter, and SCART Support
PDF  109 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TVP5146M2IPFPR Datasheet(HTML) 45 Page - Texas Instruments

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TVP5146M2
www.ti.com
SLES141H
– JULY 2005 – REVISED FEBRUARY 2012
Table 2-18. Color Killer Register
Subaddress
05h
Default
10h
7
6
5
4
3
2
1
0
Reserved
Automatic color killer
Color killer threshold [4:0]
Automatic color killer:
00 = Automatic mode (default)
01 = Reserved
10 = Color killer enabled, the C terminals are forced to a zero color state
11 = Color killer disabled
Color killer threshold [4:0]:
11111 = 31 (maximum)
10000 = 16 (default)
00000 = 0 (minimum)
Table 2-19. Luminance Processing Control 1 Register
Subaddress
06h
Default
00h
7
6
5
4
3
2
1
0
Reserved
Pedestal not
Reserved
VBI raw
Luminance signal delay [3:0]
present
Pedestal not present:
0 = 7.5 IRE pedestal is present on the analog video input signal (default)
1 = Pedestal is not present on the analog video input signal
VBI raw:
0 = Disable (default)
1 = Enable
During the duration of the vertical blanking as defined by VBLK start and stop registers 22h through 25h, the chroma samples are
replaced by luma samples. This feature may be used to support VBI processing performed by an external device during the vertical
blanking interval. To use this bit, the output format must be the 10-bit ITU-R BT.656 mode.
Luminance signal delay [3:0]:
Luminance signal delays respect to chroma signal in 1
× pixel clock increments.
0111 = Reserved
0110 = 5 pixel clocks delay
0001 = 1 pixel clock delay
0000 = 0 pixel clock delay (default)
1111 =
–1 pixel clock delay
1000 =
–8 pixel clock delay
Copyright
© 2005–2012, Texas Instruments Incorporated
Functional Description
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