CC113LRGPR.B datasheet(46/87 Pages) TI2

46 / 87 page

CC113L

SWRS108B – MAY 2011 – REVISED JUNE 2014

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Table 5-15. GDOx Signal Selection (x = 0, 1, or 2) (continued)

GDOx_CFG[5:0]

Description(1)

41 (0x29)

CHIP_RDYn.

42 (0x2A)

Reserved - used for test.

43 (0x2B)

XOSC_STABLE.

44 (0x2C) –

Reserved - used for test.

45 (0x2D)

46 (0x2E)

High impedance (3-state).

47 (0x2F)

HW to 0 (HW1 achieved by setting GDOx_INV=1). Can be used to control an external LNA

48 (0x30)

CLK_XOSC/1

49 (0x31)

CLK_XOSC/1.5

50 (0x32)

CLK_XOSC/2

51 (0x33)

CLK_XOSC/3

52 (0x34)

CLK_XOSC/4

53 (0x35)

CLK_XOSC/6

Note: There are 3 GDO pins, but only one CLK_XOSC/n can be selected as an output at

54 (0x36)

CLK_XOSC/8

any time. If CLK_XOSC/n is to be monitored on one of the GDO pins, the other two GDO

55 (0x37)

CLK_XOSC/12

pins must be configured to values less than 0x30. The GDO0 default value is

CLK_XOSC/192.

56 (0x38)

CLK_XOSC/16

To optimize RF performance, these signals should not be used while the radio is in RX

57 (0x39)

CLK_XOSC/24

mode.

58 (0x3A)

CLK_XOSC/32

59 (0x3B)

CLK_XOSC/48

60 (0x3C)

CLK_XOSC/64

61 (0x3D)

CLK_XOSC/96

62 (0x3E)

CLK_XOSC/128

63 (0x3F)

CLK_XOSC/192

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