REV. B

–10–

SSM2166

(4) When using high impedance sources (

≥5 kΩ), system gains

in excess of 60 dB are not recommended. This configuration is

rarely appropriate, as virtually all high impedance inputs provide

larger amplitude signals that do not require as much amplification.

When using high impedance sources, however, it can be advan-

tageous to shunt the source with a capacitor to ground at the input

pin of the IC (Pin 7) to lower the source impedance at high

frequencies, as shown in Figure 11. A capacitor with a value of

1000 pF is a good starting value and sets a low-pass corner

at 31 kHz for 5 k

Ω sources. In applications where the source

ground is not as “clean” as would be desirable, a capacitor

to the source ground might prove beneficial. This capacitor is

used in addition to the grounded capacitor (illustrated as C2 on

the evaluation board) used in the feedback around the buffer,

assuming that the buffer is configured for gain.

1000pF

C1

0.1 F

AUDIO IN

7

+IN

SSM2166

NOTE: ADDITIONAL CIRCUIT DETAILS

OMITTED FOR CLARITY.

Figure 11. Circuit Configuration for Use with High

Impedance Signal Sources

The value of the C7 should be the same as C6, the capacitor

makes the source ground noise appear as a common-mode

signal to the VCA, allowing the common-mode noise to be

rejected by the VCA’s differential input circuitry. C7 can also be

useful in reducing ground loop problems and in reducing noise

coupling from the power supply by balancing the impedances

connected to the inputs of the internal VCA.

SSM2166 Evaluation Board

A schematic diagram of the SSM2166 evaluation board,

available upon request from Analog Devices, is illustrated in

Figure 12. As a design aid, the layouts for the topside silkscreen

and the topside and backside metallization layers are shown in

Figures 13a, 13b, and 13c. Although not shown to scale, the

finished dimension of the evaluation board is 3.5 inches by 3.5

inches, and comes complete with pin sockets and a sample of

the SSM2166.

ROT PT.

ADJ

NOISE

GATE

ADJ

9

R7

1M

CW

R8

1k

C3

0.1 F

+V

R12

100k

J3

NOISE

GATE

POWER

DN

V+

14

C6

10 F

+

53

7

+INPUT

MIC

PWR

INPUT

JACK

1/8"

PHONE

C1

0.1 F

3

1

2

C7

10 F

+

4

GAIN

ADJUST

MUTE

SWITCH

R11

330

2

R9

1k

CW

R10

20k

C5

0.01 F

GAIN

ADJ

AVG

CAP

+

8

C4

22 F

1

–INPUT

SSM2166

6

R2

10k

C2

1 F

COMP

RATIO

10

CW

R6

100k

COMP

RATIO

13

5

4

OP113

6

7

OUTPUT

JACK

RCA

PHONO

OUTPUT

CW

R3

50k

R4

1k

ROTATION

PT ADJ

11

R1

10k

12

GND

Figure 12. Evaluation Board