CY28409

Rev 1.0, November 22, 2006

Page 6 of 16

5

1

PCI5

PCI5 Output Enable

0 = Disabled, 1 = Enabled

4

1

PCI4

PCI4 Output Enable

0 = Disabled, 1 = Enabled

3

1

PCI3

PCI3 Output Enable

0 = Disabled, 1 = Enabled

2

1

PCI2

PCI2 Output Enable

0 = Disabled, 1 = Enabled

1

1

PCI1

PCI1 Output Enable

0 = Disabled, 1 = Enabled

0

1

PCI0

PCI0 Output Enable

0 = Disabled, 1 = Enabled

Byte 4: Control Register 4

Bit

@Pup

Name

Description

7

0

USB_48

USB_48 Drive Strength

0 = High drive strength, 1 = Low drive strength

6

1

USB_48

USB_48 Output Enable

0 = Disabled, 1 = Enabled

5

0

PCIF2

Allow control of PCIF2 with assertion of PCI_STP# or SW PCI_STP

0 = Free Running, 1 = Stopped with PCI_STP#

4

0

PCIF1

Allow control of PCIF1 with assertion of PCI_STP# or SW PCI_STP

0 = Free Running, 1 = Stopped with PCI_STP#

3

0

PCIF0

Allow control of PCIF0 with assertion of PCI_STP# or SW PCI_STP

0 = Free Running, 1 = Stopped with PCI_STP#

2

1

PCIF2

PCIF2 Output Enable

0 = Disabled, 1 = Enabled

1

1

PCIF1

PCIF1 Output Enable

0 = Disabled, 1 = Enabled

0

1

PCIF0

PCIF0 Output Enable

0 = Disabled, 1 = Enabled

Byte 5: Control Register 5

Bit

@Pup

Name

Description

7

1

DOT_48

DOT_48 Output Enable

0 = Disabled, 1 = Enabled

6

1

Reserved

Reserved, Set = 1

5

0

3V66_4/VCH

VCH Select 66-MHz/48-MHz

0 = 3V66 mode, 1 = VCH (48-MHz) mode

4

1

3V66_4/VCH

3V66_4/VCH Output Enable

0 = Disabled, 1 = Enabled

3

1

3V66_3

3V66_3 Output Enable

0 = Disabled, 1 = Enabled

2

1

3V66_2

3V66_2 Output Enable

0 = Disabled, 1 = Enabled

1

1

3V66_1

3V66_1 Output Enable

0 = Disabled, 1 = Enabled

0

1

3V66_0

3V66_0 Output Enable

0 = Disabled, 1 = Enabled

Byte 3: Control Register 3 (continued)

Bit

@Pup

Name

Description