W144

Rev 1.0, November 21, 2006

Page 2 of 13

Pin Description

Pin Name

No.

Type

Description

CPU_F

44

O

Free-running CPU Clock: Output voltage swing is controlled by the voltage applied to

VDDQ2. See Tables 1 and 6 for detailed frequency information.

CPU1

43

O

CPU Clock Output 1: This CPU clock output is controlled by the CLK_STOP# control

pin. Output voltage swing is controlled by voltage applied to VDDQ2.

PCI2:5

10, 11, 12,

13

O

PCI Clock Outputs 2 through 5: These four PCI clock outputs are controlled by the

PCI_STOP# control pin. Output voltage swing is controlled by voltage applied to VDDQ3.

PCI1/FS3

8

I/O

Fixed PCI Clock Output: As an output. frequency is set by the FS0:3 inputs or through

serial input interface, see Tables 1 and 6. This output is affected by the PCI_STOP# input.

When an input, latches data selecting the frequency of the CPU and PCI outputs.

PCI_F/MODE

7

I/O

Fixed PCI Clock Output: As an output, frequency is set by the FS0:3 inputs or through

serial input interface, see Tables 1 and 6. This output is not affected by the PCI_STOP#

input. When an input, sets function of pin 2.

CLK_STOP#

41

I

CLK_STOP# input: When brought LOW, affected clock outputs are stopped LOW after

completing a full clock cycle (2–3 CPU clock latency). When brought HIGH, affected clock

outputs start, beginning with a full clock cycle (2–3 CPU clock latency).

IOAPIC

47

O

IOAPIC Clock Output: Provides 14.318-MHz fixed frequency. The output voltage swing

is controlled by VDDQ2. This output is disabled when CLK_STOP# is set LOW.

48MHz/FS0

26

I/O

48 MHz Output: 48 MHz is provided in normal operation. In standard systems, this output

can be used as the reference for the Universal Serial Bus. Upon power-up FS0 input will

be latched, which will set clock frequencies as described in Table 1.

24MHz/FS1

25

I/O

24 MHz Output: 24 MHz is provided in normal operation. In standard systems, this output

can be used as the clock input for a Super I/O chip. Upon power-up FS1 input will be

latched, which will set clock frequencies as described in Table 1.

REF1/FS2

46

I/O

I/O Dual-Function REF0 and FS2 pin: Upon power-up, FS2 input will be latched, which

will set clock frequencies as described in Table 1. When an output, this pin provides a

fixed clock signal equal in frequency to the reference signal provided at the X1/X2 pins.

REF0/

(PCI_STOP#)

2I/O

Fixed 14.318-MHz Output 0 or PCI_STOP# Pin: Function determined by MODE pin.

The PCI_STOP# input enables the PCI 1:5 outputs when HIGH and causes them to

remain at logic 0 when LOW. The PCI_STOP signal is latched on the rising edge of PCI_F.

Its effects take place on the next PCI_F clock cycle. When an output, this pin provides a

fixed clock signal equal in frequency to the reference signal provided at the X1/X2 pins.

SDRAMIN

15

I

Buffered Input Pin: The signal provided to this input pin is buffered to 13 outputs

(SDRAM0:11, SDRAM_F).

SDRAM0:11

38, 37, 35,

34, 32, 31,

29, 28, 21,

20, 18, 17

O

Buffered Outputs: These twelve dedicated outputs provide copies of the signal provided

at the SDRAMIN input. The swing is set by VDDQ3, and they are deactivated when

CLK_STOP# input is set LOW.

SDRAM_F

40

O

Free-running Buffered Output: This dedicated output provides a copy of the SDRAMIN

input which is not affected by the CLK_STOP# input

SCLK

24

I

SDATA

23

I/O

X1

4

I

Crystal Connection or External Reference Frequency Input: This pin has dual

functions. It can be used as an external 14.318-MHz crystal connection or as an external

reference frequency input.

X2

5

I

Crystal Connection: An input connection for an external 14.318-MHz crystal. If using an

external reference, this pin must be left unconnected.

VDDQ3

1, 6, 14,

19, 27, 30,

36

P

Power Connection: Power supply for core logic, PLL circuitry, SDRAM outputs, PCI

outputs, reference outputs, 48-MHz output, and 24-MHz output. Connect to 3.3V supply.

VDDQ2

42, 48

P

Power Connection: Power supply for IOAPIC, CPU_F, and CPU1 output buffers.

Connect to 2.5V or 3.3V.

GND

3, 9, 16,

22, 33, 39,

45

G

Ground Connections: Connect all ground pins to the common system ground plane.