MPF0900AMMA2ES datasheet(164/205 Pages) NXP

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NXP Semiconductors

PF09

Nine-channel power management IC with advanced system safety monitoring

ABIST flags

Description

AB_LDOx_OV

LDOx OV monitor ABIST flag

AB_LDOx_UV

LDOx UV monitor ABIST flag

AB_VAON_OV

VAON OV monitor ABIST flag

AB_VAON_UV

VAON UV monitor ABIST flag

AB_VMONx_OV

VMONx OV monitor ABIST flag

AB_VMONx_UV

VMONx UV monitor ABIST flag

AB_VDIG_OV

VDIG OV monitor ABIST flag

AB_VANA_OV

VANA OV monitor ABIST flag

AB_TSD_NOK

Thermal shutdown comparator ABIST flag

AB_RSTB_NOK

RSTB ABIST flag

AB_FS0B_NOK

FS0B ABIST flag

Table 218. ABIST flags...continued

ABIST is part of the larger self-test routine, but can also be performed separately (see Section 14.9). When

ABIST is performed as part of the self-test routine, an ABIST error is not considered to be a self-test routine

error. This allows the MCU to debug and take action after reset. When an ABIST error is present, however, the

PF09 will not release FS0B until a new ABIST is requested and passed. An exception to this rule occurs when

FS0B is used as a safety output.

When FS0B is used as a safety output, an ABIST failure on the FS0B will be considered a critical failure,

because the FS0B pin is in charge of maintaining an initial safe state for the system at power up. This kind of

failure will cause the self-test to fail and assert the STEST_NOK flag, to prevent the system from powering up

with an FS0B short-to-high condition.

14.9 ABIST on demand

A system command is provided to perform an ABIST on demand during the SYSTEM ON states. When the

SYS_CMD = 0x55, the control logic will perform an ABIST routine to verify all OV/UV monitoring circuits listed

below:

• OV/UV comparators for each individual SWx, LDOx and VAON supply

• OV/UV comparators for each individual VMONx input

• OV monitor for the internal VDIG supply

• OV monitor for the internal VANA supply

• TSD comparator for the thermal monitor

When the ABIST on demand is requested, the ABIST routine will be performed only on voltage regulators and

external VMON enabled at the time it is requested.

When the FS0B is operating in Active Safe state, if a failure condition is found during the ABIST on demand

command, the FS0B will be asserted immediately to place the system in a safe state. The PF09 will not be able

to release the FS0B pin until a new ABIST is requested and passed successfully.

14.10 Logic built-in self-test (LBIST)

14.10.1 Startup LBIST

In devices targeting a high safety integrity level (ASIL D/SIL 2), an LBIST routine is provided to ensure the

functional integrity of the logic gates controlling the safety mechanism within the digital control unit.

PF09

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.3 — 16 December 2025

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