HT25LC512 datasheet(4/11 Pages) HOLTEK

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Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

Programming the OTP ROM

fSCK

SCK Frequency

160

kHz

tWH

SCK High Time

7.5

10.5

tWL

SCK Low Time

7.5

10.5

tCS

Minimum CS High Time

tCSS

CS Setup Time

tCSH

CS Hold Time

tSU

Data in Setup Time

100

Data in Hold Time

100

Note:

For normal READ operation, don¢t use the 99H instruction.

Test Waveforms and Measurements

Output Test Load

HT25LC512

Rev. 1.00

June 14, 2004

Functional Description

Device Operation

The HT25LC512 operation is controlled by instructions

from the host processor. The HT25LC512 has only 3

kinds of instructions, Memory Read, Status Register

read and Product ID Read. Any invalid instruction will

be ignored without response from the HT25LC512. A

valid instruction starts with the falling edge of CS fol-

lowed by the appropriate 8-bit opcode and the memory

address location. While the CS pin is low, toggling the

SCK pin controls the loading of the opcode and the

memory address location through the SI (serial input)

pin. All instructions, addresses and data are transferred

with the most significant bit (MSB) first.

Memory read

Reading the HT25LC512 via the SO (Serial Output)

pin requires the following sequence. After the CS line

is pulled low to select a device, the READ instruction

is transmitted via the SI line followed by the byte ad-

dress to read. Upon completion, any data on the SI

line will be ignored. The data (D7-D0) at the specified

address is then shifted out onto the SO line. If only one

byte is to be read, the CS line should be driven high af-

ter the data comes out. The READ instruction can be

continued since the byte address is automatically in-

cremented and data will continue to be shifted out.

When the highest address is reached, the address

counter will roll over to the lowest address allowing the

entire memory to be read in one continuous READ in-

struction.

. 4

r e

r i v

i n

l s

. 0

. 8

tR, tF< 5ns (10% to 90%)

i c

Memory read, bit sequence is shown as follows:

Bit Sequential

Bit data

Bit Sequential

Bit data

A15 A14 A13 A12 A11 A10

Note:

²x² don¢t care

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