MSE908JB8 datasheet(2/4 Pages) FREESCALE

2 / 4 page

Mask Set Errata for 908JB8, Mask 3K45H

Freescale Semiconductor

Workaround

When the USB module is enabled and a USB reset is detected, either an internal reset or an interrupt to

the CPU can be generated. Which one is generated depends on the RSTD bit of CONFIG.

Configuring the USB reset to generate a USB interrupt request to the CPU by setting the RSTD bit of

CONFIG fixes this problem. When a USB reset is detected in the interrupt routines, you have two choices:

•

Reconfigure the USB module and other related registers

•

Use software to cause a device reset, for example, illegal opcode

Example code to implement an illegal opcode:

USB_ISR:

brclr b_RSTF,UIR1,No_USB_Reset ;check USB reset

$32

;illegal opcode

No_USB_Reset

Power-Up from LVR

SE115-Power

Description

A few devices start abnormally during power-up. The issue is the release of the low voltage reset (LVR)

earlier than the VREG reaching the CMOS logic operating voltage (typical 0.65 V).

The LVR takes the VDD but not the VREG as a reference. LVR exists until the VDD reaches the LVR

threshold voltage (VLVR). The problem happens in few devices when the VDD rises quickly and the VREG

rises slowly. If the LVR has been released but the VREG doesn’t reach the CMOS logic operating voltage,

the LVR does not have any effect. This might cause the internal logic to improperly initialize and the MCU

might not start normally.

Therefore, the VDD voltage must be lower than the VLVR minimum (2.8 V) when the VREG voltage

reaches the CMOS logic operating voltage.

Workaround

To fix the problem, add a 10

Ω series resistor between the power supply and the VDD, and place a 10 µF

capacitor at the VDD pin and a 4.7 µF capacitor at the VREG pin.

MSE908JB8 Datasheet(PDF) 2 Page - Freescale Semiconductor, Inc