3

A product Line of

Diodes Incorporated

PI6CB18601

www.diodes.com

June 2020

Diodes Incorporated

PI6CB18601

Document Number DS40505 Rev 3-2

Pin Number Pin Name

Type

Description

18

Q1+

Output

HCSL Differential true clock output

19

Q1-

Output

HCSL Differential complementary clock output

20, 30

NC

Output

HCSL Do not connect this pin

21

OE1#

Input

CMOS Active low input for enabling Q1 pair. This pin has an internal pull-down.

1 =disable outputs, 0 = enable outputs

22

Q2+

Output

HCSL Differential true clock output

23

Q2-

Output

HCSL Differential complementary clock output

24

OE2#

Input

CMOS Active low input for enabling Q2 pair. This pin has an internal pull-down.

1 =disable outputs, 0 = enable outputs

25

VDDA

Power

Power supply for analog circuitry

27

Q3+

Output

HCSL Differential true clock output

28

Q3-

Output

HCSL Differential complementary clock output

29

OE3#

Input

CMOS Active low input for enabling Q3 pair. This pin has an internal pull-down.

1 =disable outputs, 0 = enable outputs

33

Q4+

Output

HCSL Differential true clock output

34

Q4-

Output

HCSL Differential complementary clock output

35

OE4#

Input

CMOS Active low input for enabling Q4 pair. This pin has an internal pull-down.

1 =disable outputs, 0 = enable outputs

36

Q5+

Output

HCSL Differential true clock output

37

Q5-

Output

HCSL Differential complementary clock output

38

OE5#

Input

CMOS Active low input for enabling Q5 pair. This pin has an internal pull-down.

1 =disable outputs, 0 = enable outputs

40

PD#

Input

CMOS

Input notifies device to sample latched inputs and start up on first high

assertion. Low enters Power Down Mode, subsequent high assertions exit

Power Down Mode. This pin has internal pull-up resistor.

41

EPAD

Power

Connect to Ground

Pin Description Cont.